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minsoc WebSVN RSS feed - minsoc https://opencores.org/websvn//websvn/listing?repname=minsoc&path=%2Fminsoc%2F& Fri, 06 Mar 2026 20:13:18 +0100 FeedCreator 1.7.2 Files missing in the last commit. backend/std/configure sw: eth, uart and ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=65 <div><strong>Rev 65 - rfajardo</strong> (4 file(s) modified)</div><div>Files missing in the last commit. <br /> backend/std/configure<br /> sw: eth, uart and ...</div>+ /minsoc/trunk/backend/std/configure<br />+ /minsoc/trunk/sw/drivers/Makefile<br />+ /minsoc/trunk/sw/eth/Makefile<br />+ /minsoc/trunk/sw/uart/Makefile<br /> rfajardo Tue, 03 May 2011 12:36:44 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=65 firmware makefiles: -every firmware makefile has now ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=64 <div><strong>Rev 64 - rfajardo</strong> (61 file(s) modified)</div><div>firmware makefiles:<br /> -every firmware makefile has now ...</div>+ /minsoc/trunk/backend/ml509<br />- /minsoc/trunk/backend/ml509.ucf<br />+ /minsoc/trunk/backend/ml509/ml509.ucf<br />+ /minsoc/trunk/backend/spartan3a_dsp_kit<br />- /minsoc/trunk/backend/spartan3a_dsp_kit.ucf<br />+ /minsoc/trunk/backend/spartan3a_dsp_kit/board.h<br />+ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />+ /minsoc/trunk/backend/spartan3a_dsp_kit/minsoc_defines.v<br />+ /minsoc/trunk/backend/spartan3a_dsp_kit/orp.ld<br />+ /minsoc/trunk/backend/spartan3a_dsp_kit/spartan3a_dsp_kit.ucf<br />+ /minsoc/trunk/backend/spartan3e_starter_kit<br />- /minsoc/trunk/backend/spartan3e_starter_kit.ucf<br />+ /minsoc/trunk/backend/spartan3e_starter_kit/board.h<br />+ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />+ /minsoc/trunk/backend/spartan3e_starter_kit/minsoc_defines.v<br />+ /minsoc/trunk/backend/spartan3e_starter_kit/orp.ld<br />+ /minsoc/trunk/backend/spartan3e_starter_kit/spartan3e_starter_kit.ucf<br />+ /minsoc/trunk/backend/std<br />+ /minsoc/trunk/backend/std/board.h<br />+ /minsoc/trunk/backend/std/minsoc_defines.v<br />+ /minsoc/trunk/backend/std/orp.ld<br />~ /minsoc/trunk/bench/verilog/minsoc_bench_defines.v<br />- /minsoc/trunk/rtl/verilog/minsoc_defines.v<br />~ /minsoc/trunk/sim/bin/minsoc_verilog_files.txt<br />~ /minsoc/trunk/sw/drivers/can.c<br />+ /minsoc/trunk/sw/drivers/common.mk<br />~ /minsoc/trunk/sw/drivers/eth.c<br />~ /minsoc/trunk/sw/drivers/i2c.c<br />- /minsoc/trunk/sw/drivers/Makefile<br />~ /minsoc/trunk/sw/drivers/uart.c<br />+ /minsoc/trunk/sw/eth/common.mk<br />~ /minsoc/trunk/sw/eth/eth.c<br />- /minsoc/trunk/sw/eth/Makefile<br />- /minsoc/trunk/sw/support/board.h<br />+ /minsoc/trunk/sw/support/common.mk<br />/minsoc/trunk/sw/support/Makefile<br />~ /minsoc/trunk/sw/support/Makefile.inc<br />- /minsoc/trunk/sw/support/orp.ld<br />~ /minsoc/trunk/sw/support/reset.S<br />~ /minsoc/trunk/sw/support/tick.c<br />+ /minsoc/trunk/sw/uart/common.mk<br />- /minsoc/trunk/sw/uart/Makefile<br />~ /minsoc/trunk/sw/uart/uart.c<br />- /minsoc/trunk/syn/blackboxes/OR1K_startup_generic.v<br />- /minsoc/trunk/syn/buildSupport/adbg_top.xst<br />- /minsoc/trunk/syn/buildSupport/eth_top.xst<br />- /minsoc/trunk/syn/buildSupport/minsoc_startup_top.prj<br />- /minsoc/trunk/syn/buildSupport/minsoc_startup_top.xst<br />~ /minsoc/trunk/syn/buildSupport/minsoc_top.prj<br />- /minsoc/trunk/syn/buildSupport/minsoc_top.xst<br />- /minsoc/trunk/syn/buildSupport/or1200_top.xst<br />- /minsoc/trunk/syn/buildSupport/uart_top.xst<br />- /minsoc/trunk/syn/Makefile<br />+ /minsoc/trunk/syn/src<br />+ /minsoc/trunk/syn/src/adbg_top.xst<br />+ /minsoc/trunk/syn/src/eth_top.xst<br />+ /minsoc/trunk/syn/src/Makefile<br />+ /minsoc/trunk/syn/src/minsoc_top.xst<br />+ /minsoc/trunk/syn/src/or1200_top.xst<br />+ /minsoc/trunk/syn/src/uart_top.xst<br />- /minsoc/trunk/utils/contributions/.directory<br /> rfajardo Tue, 03 May 2011 11:01:33 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=64 Adding a functional synthesis Makefile system. Still needs a reviews ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=63 <div><strong>Rev 63 - rfajardo</strong> (26 file(s) modified)</div><div>Adding a functional synthesis Makefile system. Still needs a reviews ...</div>~ /minsoc/trunk/backend/spartan3a_dsp_kit.ucf<br />~ /minsoc/trunk/rtl/verilog/altera_pll.v<br />~ /minsoc/trunk/rtl/verilog/minsoc_defines.v<br />+ /minsoc/trunk/syn<br />+ /minsoc/trunk/syn/blackboxes<br />+ /minsoc/trunk/syn/blackboxes/adbg_top.v<br />+ /minsoc/trunk/syn/blackboxes/eth_top.v<br />+ /minsoc/trunk/syn/blackboxes/OR1K_startup_generic.v<br />+ /minsoc/trunk/syn/blackboxes/or1200_top.v<br />+ /minsoc/trunk/syn/blackboxes/uart_top.v<br />+ /minsoc/trunk/syn/buildSupport<br />+ /minsoc/trunk/syn/buildSupport/adbg_top.prj<br />+ /minsoc/trunk/syn/buildSupport/adbg_top.xst<br />+ /minsoc/trunk/syn/buildSupport/eth_top.prj<br />+ /minsoc/trunk/syn/buildSupport/eth_top.xst<br />+ /minsoc/trunk/syn/buildSupport/minsoc_startup_top.prj<br />+ /minsoc/trunk/syn/buildSupport/minsoc_startup_top.xst<br />+ /minsoc/trunk/syn/buildSupport/minsoc_top.prj<br />+ /minsoc/trunk/syn/buildSupport/minsoc_top.xst<br />+ /minsoc/trunk/syn/buildSupport/or1200_top.prj<br />+ /minsoc/trunk/syn/buildSupport/or1200_top.xst<br />+ /minsoc/trunk/syn/buildSupport/uart_top.prj<br />+ /minsoc/trunk/syn/buildSupport/uart_top.xst<br />+ /minsoc/trunk/syn/doc<br />+ /minsoc/trunk/syn/doc/guideTop.pdf<br />+ /minsoc/trunk/syn/Makefile<br /> rfajardo Fri, 29 Apr 2011 17:26:11 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=63 Wrapping different family modules of same manufacturer in a single ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=62 <div><strong>Rev 62 - rfajardo</strong> (4 file(s) modified)</div><div>Wrapping different family modules of same manufacturer in a single ...</div>+ /minsoc/trunk/rtl/verilog/altera_pll.v<br />~ /minsoc/trunk/rtl/verilog/minsoc_clock_manager.v<br />- /minsoc/trunk/rtl/verilog/minsoc_pll.v<br />+ /minsoc/trunk/rtl/verilog/xilinx_dcm.v<br /> rfajardo Fri, 29 Apr 2011 10:32:37 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=62 Removing supposely defined external function, which don't exist anymore. https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=61 <div><strong>Rev 61 - rfajardo</strong> (1 file(s) modified)</div><div>Removing supposely defined external function, which don't exist anymore.</div>~ /minsoc/trunk/sw/support/support.h<br /> rfajardo Fri, 29 Apr 2011 09:45:17 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=61 Selection of memory model or implementation memory is now made ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=60 <div><strong>Rev 60 - rfajardo</strong> (8 file(s) modified)</div><div>Selection of memory model or implementation memory is now made ...</div>~ /minsoc/trunk/bench/verilog/minsoc_bench.v<br />~ /minsoc/trunk/bench/verilog/minsoc_bench_defines.v<br />~ /minsoc/trunk/bench/verilog/minsoc_memory_model.v<br />~ /minsoc/trunk/rtl/verilog/minsoc_top.v<br />- /minsoc/trunk/sim/bin/minsoc_memory.txt<br />- /minsoc/trunk/sim/bin/minsoc_model.txt<br />+ /minsoc/trunk/sim/bin/minsoc_verilog_files.txt<br />~ /minsoc/trunk/sim/run/generate_bench<br /> rfajardo Thu, 28 Apr 2011 22:44:09 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=60 undefinition of NEGATIVE_RESET on minsoc_bench_defines.v cannot affect other inclusions of ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=59 <div><strong>Rev 59 - rfajardo</strong> (2 file(s) modified)</div><div>undefinition of NEGATIVE_RESET on minsoc_bench_defines.v cannot affect other inclusions of ...</div>~ /minsoc/trunk/bench/verilog/minsoc_bench.v<br />~ /minsoc/trunk/bench/verilog/minsoc_bench_defines.v<br /> rfajardo Thu, 28 Apr 2011 21:59:30 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=59 Standard definitions depended on implementation order. Now, this should be ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=58 <div><strong>Rev 58 - rfajardo</strong> (2 file(s) modified)</div><div>Standard definitions depended on implementation order. Now, this should be ...</div>~ /minsoc/trunk/bench/verilog/minsoc_bench_defines.v<br />~ /minsoc/trunk/rtl/verilog/minsoc_defines.v<br /> rfajardo Thu, 28 Apr 2011 21:50:11 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=58 If a FPGA manufacturer is selected, the FPGA families of ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=57 <div><strong>Rev 57 - rfajardo</strong> (1 file(s) modified)</div><div>If a FPGA manufacturer is selected, the FPGA families of ...</div>~ /minsoc/trunk/rtl/verilog/minsoc_defines.v<br /> rfajardo Thu, 28 Apr 2011 21:27:09 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=57 Macros for all Altera family devices and pll instantiation https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=56 <div><strong>Rev 56 - javieralso</strong> (4 file(s) modified)</div><div>Macros for all Altera family devices and pll instantiation</div>~ /minsoc/trunk/rtl/verilog/minsoc_clock_manager.v<br />~ /minsoc/trunk/rtl/verilog/minsoc_defines.v<br />~ /minsoc/trunk/rtl/verilog/minsoc_pll.v<br />~ /minsoc/trunk/rtl/verilog/minsoc_top.v<br /> javieralso Thu, 21 Apr 2011 22:40:38 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=56 Adjusting Makefiles to compile correctly with new firmware updates. 1) ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=55 <div><strong>Rev 55 - rfajardo</strong> (4 file(s) modified)</div><div>Adjusting Makefiles to compile correctly with new firmware updates. <br /> <br /> 1) ...</div>~ /minsoc/trunk/sw/eth/Makefile<br />~ /minsoc/trunk/sw/support/int.c<br />~ /minsoc/trunk/sw/support/Makefile<br />~ /minsoc/trunk/sw/uart/Makefile<br /> rfajardo Wed, 20 Apr 2011 14:12:19 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=55 Moving spr_defs.h to or1200.h https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=54 <div><strong>Rev 54 - ConX.</strong> (2 file(s) modified)</div><div>Moving spr_defs.h to or1200.h</div>+ /minsoc/trunk/sw/support/or1200.h<br />- /minsoc/trunk/sw/support/spr_defs.h<br /> ConX. Wed, 20 Apr 2011 12:35:13 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=54 Indentation, deleting redundant files and adding externals https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=53 <div><strong>Rev 53 - ConX.</strong> (29 file(s) modified)</div><div>Indentation, deleting redundant files and adding externals</div>~ /minsoc/trunk/rtl/verilog<br />~ /minsoc/trunk/sw/drivers/can.c<br />~ /minsoc/trunk/sw/drivers/can.h<br />~ /minsoc/trunk/sw/drivers/eth.c<br />~ /minsoc/trunk/sw/drivers/eth.h<br />~ /minsoc/trunk/sw/drivers/i2c.c<br />~ /minsoc/trunk/sw/drivers/i2c.h<br />~ /minsoc/trunk/sw/drivers/interrupts.c<br />~ /minsoc/trunk/sw/drivers/Makefile<br />- /minsoc/trunk/sw/drivers/tick.c<br />- /minsoc/trunk/sw/drivers/tick.h<br />~ /minsoc/trunk/sw/drivers/uart.c<br />~ /minsoc/trunk/sw/drivers/uart.h<br />~ /minsoc/trunk/sw/eth/eth.c<br />~ /minsoc/trunk/sw/support/board.h<br />~ /minsoc/trunk/sw/support/except.S<br />~ /minsoc/trunk/sw/support/int.c<br />~ /minsoc/trunk/sw/support/int.h<br />~ /minsoc/trunk/sw/support/Makefile<br />~ /minsoc/trunk/sw/support/reset.S<br />~ /minsoc/trunk/sw/support/support.c<br />~ /minsoc/trunk/sw/support/support.h<br />+ /minsoc/trunk/sw/support/tick.c<br />+ /minsoc/trunk/sw/support/tick.h<br />- /minsoc/trunk/sw/support/uart.c<br />- /minsoc/trunk/sw/support/uart.h<br />- /minsoc/trunk/sw/support/vfnprintf.c<br />- /minsoc/trunk/sw/support/vfnprintf.h<br />~ /minsoc/trunk/sw/uart/uart.c<br /> ConX. Wed, 20 Apr 2011 11:16:36 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=53 Altera ALTPLL Megafunction Instantiation https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=52 <div><strong>Rev 52 - javieralso</strong> (4 file(s) modified)</div><div>Altera ALTPLL Megafunction Instantiation</div>~ /minsoc/trunk/rtl/verilog/minsoc_clock_manager.v<br />~ /minsoc/trunk/rtl/verilog/minsoc_defines.v<br />+ /minsoc/trunk/rtl/verilog/minsoc_pll.v<br />~ /minsoc/trunk/rtl/verilog/minsoc_top.v<br /> javieralso Mon, 11 Apr 2011 21:03:29 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=52 sw/support/uart.c: Changing the order of writes to the Divisor Latch ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=51 <div><strong>Rev 51 - rfajardo</strong> (1 file(s) modified)</div><div>sw/support/uart.c: Changing the order of writes to the Divisor Latch ...</div>~ /minsoc/trunk/sw/support/uart.c<br /> rfajardo Tue, 05 Apr 2011 08:27:06 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=51 Removing unused firmware files, respective to or1ksim actually. Removing the inclusion ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=50 <div><strong>Rev 50 - rfajardo</strong> (4 file(s) modified)</div><div>Removing unused firmware files, respective to or1ksim actually.<br /> <br /> Removing the inclusion ...</div>~ /minsoc/trunk/sw/support/except.S<br />- /minsoc/trunk/sw/support/mc.h<br />- /minsoc/trunk/sw/support/orp.cfg<br />~ /minsoc/trunk/sw/support/reset.S<br /> rfajardo Thu, 24 Mar 2011 11:56:19 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=50 Language correction for README.txt. https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=49 <div><strong>Rev 49 - rfajardo</strong> (1 file(s) modified)</div><div>Language correction for README.txt.</div>~ /minsoc/trunk/doc/README.txt<br /> rfajardo Tue, 22 Mar 2011 14:18:47 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=49 Clear some old docs that are already ported to MinSOC's ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=48 <div><strong>Rev 48 - ConX.</strong> (12 file(s) modified)</div><div>Clear some old docs that are already ported to MinSOC's ...</div>- /minsoc/trunk/doc/FAQ.pdf<br />- /minsoc/trunk/doc/HOWTO.pdf<br />- /minsoc/trunk/doc/INSTALL.pdf<br />~ /minsoc/trunk/doc/README.txt<br />- /minsoc/trunk/doc/src/FAQ.odt<br />- /minsoc/trunk/doc/src/HOWTO.odt<br />- /minsoc/trunk/doc/src/INSTALL.odt<br />- /minsoc/trunk/doc/src/status_progress.odt<br />- /minsoc/trunk/doc/src/synthesis_examples.odt<br />- /minsoc/trunk/doc/status_progress.pdf<br />- /minsoc/trunk/doc/synthesis_examples.pdf<br />- /minsoc/trunk/doc/THESIS.txt<br /> ConX. Tue, 22 Mar 2011 13:11:55 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=48 Firmware updated to work with gcc-4.5. It is actually working ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=47 <div><strong>Rev 47 - rfajardo</strong> (3 file(s) modified)</div><div>Firmware updated to work with gcc-4.5. It is actually working ...</div>~ /minsoc/trunk/sw/support/except.S<br />~ /minsoc/trunk/sw/support/reset.S<br />- /minsoc/trunk/utils/contributions/assembly_new_toolchain<br /> rfajardo Mon, 21 Mar 2011 14:48:41 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=47 Including an explanation of what has to be updated on ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=46 <div><strong>Rev 46 - rfajardo</strong> (1 file(s) modified)</div><div>Including an explanation of what has to be updated on ...</div>+ /minsoc/trunk/utils/contributions/gpio/todo.txt<br /> rfajardo Mon, 21 Mar 2011 10:12:12 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2F&rev=46

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