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minsoc WebSVN RSS feed - minsoc https://opencores.org/websvn//websvn/listing?repname=minsoc&path=%2Fminsoc%2Fbranches%2Frc-1.0%2Fbackend%2Faltera_3c25_board%2Fminsoc_bench_defines.v& Fri, 15 Jan 2021 21:41:16 +0100 FeedCreator 1.7.2 Removing Verilog delays from minsoc_bench.v. minsoc_bench_defines.v defines now if uart ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Fbranches%2Frc-1.0%2Fbackend%2Faltera_3c25_board%2F&rev=124 <div><strong>Rev 124 - rfajardo</strong> (6 file(s) modified)</div><div>Removing Verilog delays from minsoc_bench.v. minsoc_bench_defines.v defines now if uart ...</div>~ /minsoc/branches/rc-1.0/backend/altera_3c25_board/minsoc_bench_defines.v<br />~ /minsoc/branches/rc-1.0/backend/spartan3a_dsp_kit/minsoc_bench_defines.v<br />~ /minsoc/branches/rc-1.0/backend/spartan3e_starter_kit/minsoc_bench_defines.v<br />~ /minsoc/branches/rc-1.0/backend/spartan3e_starter_kit_eth/minsoc_bench_defines.v<br />~ /minsoc/branches/rc-1.0/backend/std/minsoc_bench_defines.v<br />~ /minsoc/branches/rc-1.0/bench/verilog/minsoc_bench.v<br /> rfajardo Wed, 02 Nov 2011 15:27:24 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Fbranches%2Frc-1.0%2Fbackend%2Faltera_3c25_board%2F&rev=124 Creating a branche for release candidate 1.0. https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Fbranches%2Frc-1.0%2Fbackend%2Faltera_3c25_board%2F&rev=109 <div><strong>Rev 109 - rfajardo</strong> (1 file(s) modified)</div><div>Creating a branche for release candidate 1.0.</div>+ /minsoc/branches/rc-1.0<br /> rfajardo Wed, 26 Oct 2011 19:51:48 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Fbranches%2Frc-1.0%2Fbackend%2Faltera_3c25_board%2F&rev=109 Support for Altera synthesis. It needs some tune, but it ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Fbranches%2Frc-1.0%2Fbackend%2Faltera_3c25_board%2F&rev=93 <div><strong>Rev 93 - javieralso</strong> (17 file(s) modified)</div><div>Support for Altera synthesis. It needs some tune, but it ...</div>+ /minsoc/trunk/backend/altera_3c25_board<br />+ /minsoc/trunk/backend/altera_3c25_board/altera_3c25_board.ucf<br />+ /minsoc/trunk/backend/altera_3c25_board/board.h<br />+ /minsoc/trunk/backend/altera_3c25_board/configure<br />+ /minsoc/trunk/backend/altera_3c25_board/gcc-opt.mk<br />+ /minsoc/trunk/backend/altera_3c25_board/minsoc_bench_defines.v<br />+ /minsoc/trunk/backend/altera_3c25_board/minsoc_defines.v<br />+ /minsoc/trunk/backend/altera_3c25_board/orp.ld<br />+ /minsoc/trunk/prj/altera/adv_dbg.prj<br />+ /minsoc/trunk/prj/altera/altera_jtag.prj<br />+ /minsoc/trunk/prj/altera/ethmac.prj<br />+ /minsoc/trunk/prj/altera/minsoc_top.prj<br />+ /minsoc/trunk/prj/altera/minsoc_top.qsf<br />+ /minsoc/trunk/prj/altera/or1k.prj<br />+ /minsoc/trunk/prj/altera/uart16550.prj<br />+ /minsoc/trunk/syn/altera<br />+ /minsoc/trunk/syn/altera/Makefile<br /> javieralso Thu, 08 Sep 2011 07:33:25 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Fbranches%2Frc-1.0%2Fbackend%2Faltera_3c25_board%2F&rev=93
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