OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Error creating feed file, please check write permissions.
minsoc WebSVN RSS feed - minsoc https://opencores.org/websvn//websvn/listing?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F& Thu, 05 Dec 2019 14:57:47 +0100 FeedCreator 1.7.2 Updating configure scripts. Calling make into the right directories now. https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=144 <div><strong>Rev 144 - rfajardo</strong> (5 file(s) modified)</div><div>Updating configure scripts. Calling make into the right directories now.</div>~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/std/configure<br /> rfajardo Tue, 22 Nov 2011 11:03:57 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=144 Updating configure.sh: 1) we don't patch ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=142 <div><strong>Rev 142 - rfajardo</strong> (6 file(s) modified)</div><div>Updating configure.sh: <br /> 1) we don't patch ...</div>~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/std/configure<br />~ /minsoc/trunk/utils/setup/configure.sh<br /> rfajardo Tue, 22 Nov 2011 10:54:44 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=142 Merging with rc-1.0 revision 140. I doubt rc-1.0 will still ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=141 <div><strong>Rev 141 - rfajardo</strong> (32 file(s) modified)</div><div>Merging with rc-1.0 revision 140. I doubt rc-1.0 will still ...</div>~ /minsoc/trunk<br />~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/altera_3c25_board/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/std/configure<br />~ /minsoc/trunk/backend/std/minsoc_bench_defines.v<br />/minsoc/trunk/bench/verilog/minsoc_bench.v<br />~ /minsoc/trunk/prj/Makefile<br />- /minsoc/trunk/prj/scripts/altprj.sh<br />+ /minsoc/trunk/prj/scripts/altvhdprj.sh<br />+ /minsoc/trunk/prj/scripts/altvprj.sh<br />~ /minsoc/trunk/prj/scripts/simverilog.sh<br />~ /minsoc/trunk/prj/scripts/simvhdl.sh<br />~ /minsoc/trunk/prj/scripts/xilinxprj.sh<br />~ /minsoc/trunk/prj/src/ethmac.prj<br />~ /minsoc/trunk/sim/modelsim/compile_design.bat<br />~ /minsoc/trunk/sim/modelsim/prepare_modelsim.bat<br />~ /minsoc/trunk/sim/modelsim/run_sim.bat<br />~ /minsoc/trunk/sim/modelsim/run_sim.sh<br />~ /minsoc/trunk/sim/run/run_bench<br />~ /minsoc/trunk/sw/utils/bin2hex.c<br />~ /minsoc/trunk/syn/xilinx/setup.bat<br />~ /minsoc/trunk/utils/setup/beautify.sh<br />+ /minsoc/trunk/utils/setup/configure.sh<br />~ /minsoc/trunk/utils/setup/minsoc-install.sh<br />+ /minsoc/trunk/utils/setup/minsoc-setup.sh<br />~ /minsoc/trunk/utils/setup/required-cygwin-tools.txt<br /> rfajardo Tue, 22 Nov 2011 10:46:40 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=141 Installation on Ubuntu-11.10 has shown that package texinfo is required ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=135 <div><strong>Rev 135 - rfajardo</strong> (1 file(s) modified)</div><div>Installation on Ubuntu-11.10 has shown that package texinfo is required ...</div>~ /minsoc/trunk/utils/setup/minsoc-install.sh<br /> rfajardo Mon, 14 Nov 2011 15:12:40 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=135 Scripts updates to correct paths when working under Windows. Now, ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=108 <div><strong>Rev 108 - rfajardo</strong> (4 file(s) modified)</div><div>Scripts updates to correct paths when working under Windows. Now, ...</div>~ /minsoc/trunk/prj/scripts/simverilog.sh<br />~ /minsoc/trunk/prj/scripts/simvhdl.sh<br />~ /minsoc/trunk/prj/scripts/xilinxprj.sh<br />~ /minsoc/trunk/prj/scripts/xilinxxst.sh<br /> rfajardo Wed, 26 Oct 2011 16:48:51 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=108 Adding setup batch script for Altera synthesis on Windows. prj/scripts/altprj.sh ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=107 <div><strong>Rev 107 - rfajardo</strong> (2 file(s) modified)</div><div>Adding setup batch script for Altera synthesis on Windows. <br /> <br /> prj/scripts/altprj.sh ...</div>~ /minsoc/trunk/prj/scripts/altprj.sh<br />+ /minsoc/trunk/syn/altera/setup.bat<br /> rfajardo Wed, 26 Oct 2011 13:49:41 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=107 Installation script was checking the ENV variable before setting it. https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=106 <div><strong>Rev 106 - rfajardo</strong> (1 file(s) modified)</div><div>Installation script was checking the ENV variable before setting it.</div>~ /minsoc/trunk/utils/setup/minsoc-install.sh<br /> rfajardo Wed, 26 Oct 2011 10:57:07 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=106 Updating configure scripts to copy Windows synthesis launch script setup.bat ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=105 <div><strong>Rev 105 - rfajardo</strong> (7 file(s) modified)</div><div>Updating configure scripts to copy Windows synthesis launch script setup.bat ...</div>~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/std/configure<br />- /minsoc/trunk/syn/setup.bat<br />+ /minsoc/trunk/syn/xilinx/setup.bat<br /> rfajardo Wed, 26 Oct 2011 09:09:30 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=105 Enabling modelsim simulation for current project definition. vhdl and verilog projects ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=104 <div><strong>Rev 104 - rfajardo</strong> (7 file(s) modified)</div><div>Enabling modelsim simulation for current project definition.<br /> vhdl and verilog projects ...</div>~ /minsoc/trunk/prj/Makefile<br />- /minsoc/trunk/prj/scripts/simprj.sh<br />+ /minsoc/trunk/prj/scripts/simverilog.sh<br />+ /minsoc/trunk/prj/scripts/simvhdl.sh<br />~ /minsoc/trunk/sim/modelsim/compile_design.bat<br />~ /minsoc/trunk/sim/modelsim/compile_design.sh<br />~ /minsoc/trunk/sim/run/generate_bench<br /> rfajardo Wed, 19 Oct 2011 10:31:39 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=104 But the file is called gdb-6.8a.tar.bz2, so tar must be ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=103 <div><strong>Rev 103 - rfajardo</strong> (1 file(s) modified)</div><div>But the file is called gdb-6.8a.tar.bz2, so tar must be ...</div>~ /minsoc/trunk/utils/setup/minsoc-install.sh<br /> rfajardo Sun, 16 Oct 2011 19:26:39 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=103 GNU GDB FTP has renamed gdb-6.8 package to gdb-6.8a package. ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=102 <div><strong>Rev 102 - rfajardo</strong> (1 file(s) modified)</div><div>GNU GDB FTP has renamed gdb-6.8 package to gdb-6.8a package. ...</div>~ /minsoc/trunk/utils/setup/minsoc-install.sh<br /> rfajardo Sun, 16 Oct 2011 19:23:51 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=102 Documentation, wiki's address updated. https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=101 <div><strong>Rev 101 - rfajardo</strong> (1 file(s) modified)</div><div>Documentation, wiki's address updated.</div>~ /minsoc/trunk/doc/README.txt<br /> rfajardo Wed, 21 Sep 2011 07:28:39 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=101 syn/altera/minsoc_top.qsf: I thought this file was being generated now as ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=100 <div><strong>Rev 100 - rfajardo</strong> (1 file(s) modified)</div><div>syn/altera/minsoc_top.qsf: I thought this file was being generated now as ...</div>+ /minsoc/trunk/syn/altera/minsoc_top.qsf<br /> rfajardo Mon, 12 Sep 2011 09:32:53 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=100 backend/altera_3c25_board/minsoc_defines. ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=99 <div><strong>Rev 99 - rfajardo</strong> (1 file(s) modified)</div><div>backend/altera_3c25_board/minsoc_defines.v: if GENERIC_FPGA selected, undefine ALTERA_FPGA and FPGA_FAMILY to avoid ...</div>~ /minsoc/trunk/backend/altera_3c25_board/minsoc_defines.v<br /> rfajardo Mon, 12 Sep 2011 09:30:45 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=99 Removing deprecated minsoc_top.qsf file. https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=98 <div><strong>Rev 98 - rfajardo</strong> (1 file(s) modified)</div><div>Removing deprecated minsoc_top.qsf file.</div>- /minsoc/trunk/syn/altera/minsoc_top.qsf<br /> rfajardo Mon, 12 Sep 2011 09:01:22 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=98 As proposed by Javier Almansa automatically generated project files for ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=97 <div><strong>Rev 97 - rfajardo</strong> (32 file(s) modified)</div><div>As proposed by Javier Almansa automatically generated project files for ...</div>~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/std/configure<br />- /minsoc/trunk/prj/altera/adbg_top.prj<br />- /minsoc/trunk/prj/altera/altera_virtual_jtag.prj<br />- /minsoc/trunk/prj/altera/ethmac.prj<br />- /minsoc/trunk/prj/altera/jtag_top.prj<br />- /minsoc/trunk/prj/altera/minsoc_bench.prj<br />- /minsoc/trunk/prj/altera/minsoc_top.prj<br />- /minsoc/trunk/prj/altera/or1200_top.prj<br />- /minsoc/trunk/prj/altera/uart_top.prj<br />- /minsoc/trunk/prj/sim/adbg_top.src<br />- /minsoc/trunk/prj/sim/ethmac.src<br />- /minsoc/trunk/prj/sim/jtag_top.src<br />- /minsoc/trunk/prj/sim/minsoc.src<br />- /minsoc/trunk/prj/sim/minsoc_top.src<br />- /minsoc/trunk/prj/sim/or1200_top.src<br />- /minsoc/trunk/prj/sim/uart_top.src<br />- /minsoc/trunk/prj/xilinx/adbg_top.prj<br />- /minsoc/trunk/prj/xilinx/adbg_top.xst<br />- /minsoc/trunk/prj/xilinx/ethmac.prj<br />- /minsoc/trunk/prj/xilinx/ethmac.xst<br />- /minsoc/trunk/prj/xilinx/jtag_top.prj<br />- /minsoc/trunk/prj/xilinx/jtag_top.xst<br />- /minsoc/trunk/prj/xilinx/minsoc_top.prj<br />- /minsoc/trunk/prj/xilinx/minsoc_top.xst<br />- /minsoc/trunk/prj/xilinx/or1200_top.prj<br />- /minsoc/trunk/prj/xilinx/or1200_top.xst<br />- /minsoc/trunk/prj/xilinx/uart_top.prj<br />- /minsoc/trunk/prj/xilinx/uart_top.xst<br /> rfajardo Mon, 12 Sep 2011 08:54:47 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=97 Some files needed for Altera synthesis https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=96 <div><strong>Rev 96 - javieralso</strong> (5 file(s) modified)</div><div>Some files needed for Altera synthesis</div>~ /minsoc/trunk/backend/altera_3c25_board/configure<br />+ /minsoc/trunk/prj/altera/altera_virtual_jtag.prj<br />~ /minsoc/trunk/prj/Makefile<br />+ /minsoc/trunk/prj/scripts/altprj.sh<br />+ /minsoc/trunk/prj/src/altera_virtual_jtag.prj<br /> javieralso Sun, 11 Sep 2011 22:08:57 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=96 Makefile for Altera FPGAs fixed https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=95 <div><strong>Rev 95 - javieralso</strong> (17 file(s) modified)</div><div>Makefile for Altera FPGAs fixed</div>~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/altera_3c25_board/minsoc_defines.v<br />+ /minsoc/trunk/prj/altera/adbg_top.prj<br />- /minsoc/trunk/prj/altera/adv_dbg.prj<br />- /minsoc/trunk/prj/altera/altera_jtag.prj<br />/minsoc/trunk/prj/altera/ethmac.prj<br />+ /minsoc/trunk/prj/altera/jtag_top.prj<br />+ /minsoc/trunk/prj/altera/minsoc_bench.prj<br />/minsoc/trunk/prj/altera/minsoc_top.prj<br />- /minsoc/trunk/prj/altera/minsoc_top.qsf<br />- /minsoc/trunk/prj/altera/or1k.prj<br />+ /minsoc/trunk/prj/altera/or1200_top.prj<br />- /minsoc/trunk/prj/altera/uart16550.prj<br />+ /minsoc/trunk/prj/altera/uart_top.prj<br />~ /minsoc/trunk/prj/Makefile<br />~ /minsoc/trunk/syn/altera/Makefile<br />+ /minsoc/trunk/syn/altera/minsoc_top.qsf<br /> javieralso Sat, 10 Sep 2011 19:03:56 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=95 Fix bug in minsoc_top.prj for Altera synthesis https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=94 <div><strong>Rev 94 - javieralso</strong> (1 file(s) modified)</div><div>Fix bug in minsoc_top.prj for Altera synthesis</div>~ /minsoc/trunk/prj/altera/minsoc_top.prj<br /> javieralso Thu, 08 Sep 2011 10:22:37 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=94 Support for Altera synthesis. It needs some tune, but it ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=93 <div><strong>Rev 93 - javieralso</strong> (17 file(s) modified)</div><div>Support for Altera synthesis. It needs some tune, but it ...</div>+ /minsoc/trunk/backend/altera_3c25_board<br />+ /minsoc/trunk/backend/altera_3c25_board/altera_3c25_board.ucf<br />+ /minsoc/trunk/backend/altera_3c25_board/board.h<br />+ /minsoc/trunk/backend/altera_3c25_board/configure<br />+ /minsoc/trunk/backend/altera_3c25_board/gcc-opt.mk<br />+ /minsoc/trunk/backend/altera_3c25_board/minsoc_bench_defines.v<br />+ /minsoc/trunk/backend/altera_3c25_board/minsoc_defines.v<br />+ /minsoc/trunk/backend/altera_3c25_board/orp.ld<br />+ /minsoc/trunk/prj/altera/adv_dbg.prj<br />+ /minsoc/trunk/prj/altera/altera_jtag.prj<br />+ /minsoc/trunk/prj/altera/ethmac.prj<br />+ /minsoc/trunk/prj/altera/minsoc_top.prj<br />+ /minsoc/trunk/prj/altera/minsoc_top.qsf<br />+ /minsoc/trunk/prj/altera/or1k.prj<br />+ /minsoc/trunk/prj/altera/uart16550.prj<br />+ /minsoc/trunk/syn/altera<br />+ /minsoc/trunk/syn/altera/Makefile<br /> javieralso Thu, 08 Sep 2011 07:33:25 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=93
© copyright 1999-2019 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.