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minsoc WebSVN RSS feed - minsoc https://opencores.org/websvn//websvn/listing?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F& Thu, 28 Mar 2024 08:34:23 +0100 FeedCreator 1.7.2 Correcting configure parameters of adv_jtag_bridge on installation script. https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=161 <div><strong>Rev 161 - rfajardo</strong> (1 file(s) modified)</div><div>Correcting configure parameters of adv_jtag_bridge on installation script.</div>~ /minsoc/trunk/utils/setup/minsoc-install.sh<br /> rfajardo Sat, 07 Jan 2012 12:27:25 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=161 Typo in minsoc-install.sh script. Adv_jtag_bridge was not configuring correctly. https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=160 <div><strong>Rev 160 - rfajardo</strong> (1 file(s) modified)</div><div>Typo in minsoc-install.sh script. Adv_jtag_bridge was not configuring correctly.</div>~ /minsoc/trunk/utils/setup/minsoc-install.sh<br /> rfajardo Sat, 07 Jan 2012 12:05:04 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=160 Updated constraint file for de2_115 board. (Richard Hasha) https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=159 <div><strong>Rev 159 - rfajardo</strong> (2 file(s) modified)</div><div>Updated constraint file for de2_115 board. (Richard Hasha)</div>~ /minsoc/trunk/backend/de2_115_board/de2_115_board.ucf<br />~ /minsoc/trunk/utils/setup/required-cygwin-tools.txt<br /> rfajardo Sat, 07 Jan 2012 11:35:38 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=159 Adding de2_115_board port, thanks to Richard Hasha. Support to JSP (JTAG ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=158 <div><strong>Rev 158 - rfajardo</strong> (46 file(s) modified)</div><div>Adding de2_115_board port, thanks to Richard Hasha.<br /> <br /> Support to JSP (JTAG ...</div>~ /minsoc/trunk/backend/altera_3c25_board/board.h<br />~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/altera_3c25_board/minsoc_defines.v<br />+ /minsoc/trunk/backend/de2_115_board<br />+ /minsoc/trunk/backend/de2_115_board/board.h<br />+ /minsoc/trunk/backend/de2_115_board/configure<br />+ /minsoc/trunk/backend/de2_115_board/de2_115_board.ucf<br />+ /minsoc/trunk/backend/de2_115_board/gcc-opt.mk<br />+ /minsoc/trunk/backend/de2_115_board/minsoc_bench_defines.v<br />+ /minsoc/trunk/backend/de2_115_board/minsoc_defines.v<br />+ /minsoc/trunk/backend/de2_115_board/orp.ld<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/board.h<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/minsoc_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/board.h<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/minsoc_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/board.h<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/minsoc_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/spartan3e_starter_kit_eth.ucf<br />~ /minsoc/trunk/backend/std/board.h<br />~ /minsoc/trunk/backend/std/configure<br />~ /minsoc/trunk/backend/std/minsoc_defines.v<br />~ /minsoc/trunk/backend/ug257/board.h<br />~ /minsoc/trunk/backend/ug257/configure<br />~ /minsoc/trunk/backend/ug257/minsoc_defines.v<br />~ /minsoc/trunk/prj/src/adbg_top.prj<br />~ /minsoc/trunk/prj/src/minsoc_top.prj<br />+ /minsoc/trunk/rtl/verilog/interconnect_defines.v<br />~ /minsoc/trunk/rtl/verilog/minsoc_top.v<br />~ /minsoc/trunk/sw/drivers/can.c<br />~ /minsoc/trunk/sw/drivers/eth.c<br />~ /minsoc/trunk/sw/drivers/i2c.c<br />+ /minsoc/trunk/sw/drivers/interconnect.h<br />~ /minsoc/trunk/sw/drivers/uart.c<br />~ /minsoc/trunk/sw/drivers/uart.h<br />~ /minsoc/trunk/sw/eth/eth.c<br />~ /minsoc/trunk/sw/eth/Makefile<br />+ /minsoc/trunk/sw/jsp<br />+ /minsoc/trunk/sw/jsp/jsp.c<br />+ /minsoc/trunk/sw/jsp/Makefile<br />~ /minsoc/trunk/sw/uart/Makefile<br />~ /minsoc/trunk/sw/uart/uart.c<br />~ /minsoc/trunk/utils/setup/configure.sh<br />~ /minsoc/trunk/utils/setup/minsoc-install.sh<br /> rfajardo Thu, 05 Jan 2012 19:32:03 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=158 Removed obsolete file; the changes in this version have been ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=157 <div><strong>Rev 157 - nyawn</strong> (1 file(s) modified)</div><div>Removed obsolete file; the changes in this version have been ...</div>- /minsoc/trunk/utils/cable_parallel.c<br /> nyawn Sat, 31 Dec 2011 00:35:25 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=157 Added hardware watchpoint indicators to debug unit break input, to ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=156 <div><strong>Rev 156 - nyawn</strong> (1 file(s) modified)</div><div>Added hardware watchpoint indicators to debug unit break input, to ...</div>~ /minsoc/trunk/rtl/verilog/minsoc_top.v<br /> nyawn Sat, 31 Dec 2011 00:34:04 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=156 Decreased wait time, for faster simulations. https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=155 <div><strong>Rev 155 - nyawn</strong> (1 file(s) modified)</div><div>Decreased wait time, for faster simulations.</div>~ /minsoc/trunk/bench/verilog/vpi/dbg_comm_vpi.v<br /> nyawn Sat, 31 Dec 2011 00:32:35 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=155 Modified to use the new autotools support in the advanced ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=154 <div><strong>Rev 154 - nyawn</strong> (1 file(s) modified)</div><div>Modified to use the new autotools support in the advanced ...</div>~ /minsoc/trunk/utils/setup/minsoc-install.sh<br /> nyawn Sat, 31 Dec 2011 00:28:58 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=154 Merging differences of release candidate 1.0 revision 140:148 with trunk. https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=149 <div><strong>Rev 149 - rfajardo</strong> (19 file(s) modified)</div><div>Merging differences of release candidate 1.0 revision 140:148 with trunk.</div>~ /minsoc/trunk<br />~ /minsoc/trunk/backend/altera_3c25_board/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/std/minsoc_bench_defines.v<br />+ /minsoc/trunk/backend/ug257<br />/minsoc/trunk/backend/ug257/board.h<br />/minsoc/trunk/backend/ug257/configure<br />/minsoc/trunk/backend/ug257/gcc-opt.mk<br />/minsoc/trunk/backend/ug257/minsoc_bench_defines.v<br />/minsoc/trunk/backend/ug257/minsoc_defines.v<br />/minsoc/trunk/backend/ug257/orp.ld<br />/minsoc/trunk/backend/ug257/ug257.ucf<br />~ /minsoc/trunk/bench/verilog/minsoc_bench.v<br />~ /minsoc/trunk/sim/run/run_bench<br />~ /minsoc/trunk/sw/drivers/uart.c<br />~ /minsoc/trunk/sw/eth/eth.c<br />~ /minsoc/trunk/sw/uart/uart.c<br />~ /minsoc/trunk/utils/setup/minsoc-install.sh<br /> rfajardo Mon, 28 Nov 2011 10:02:52 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=149 Updating configure scripts. Calling make into the right directories now. https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=144 <div><strong>Rev 144 - rfajardo</strong> (5 file(s) modified)</div><div>Updating configure scripts. Calling make into the right directories now.</div>~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/std/configure<br /> rfajardo Tue, 22 Nov 2011 11:03:57 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=144 Updating configure.sh: 1) we don't patch ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=142 <div><strong>Rev 142 - rfajardo</strong> (6 file(s) modified)</div><div>Updating configure.sh: <br /> 1) we don't patch ...</div>~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/std/configure<br />~ /minsoc/trunk/utils/setup/configure.sh<br /> rfajardo Tue, 22 Nov 2011 10:54:44 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=142 Merging with rc-1.0 revision 140. I doubt rc-1.0 will still ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=141 <div><strong>Rev 141 - rfajardo</strong> (32 file(s) modified)</div><div>Merging with rc-1.0 revision 140. I doubt rc-1.0 will still ...</div>~ /minsoc/trunk<br />~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/altera_3c25_board/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/std/configure<br />~ /minsoc/trunk/backend/std/minsoc_bench_defines.v<br />/minsoc/trunk/bench/verilog/minsoc_bench.v<br />~ /minsoc/trunk/prj/Makefile<br />- /minsoc/trunk/prj/scripts/altprj.sh<br />+ /minsoc/trunk/prj/scripts/altvhdprj.sh<br />+ /minsoc/trunk/prj/scripts/altvprj.sh<br />~ /minsoc/trunk/prj/scripts/simverilog.sh<br />~ /minsoc/trunk/prj/scripts/simvhdl.sh<br />~ /minsoc/trunk/prj/scripts/xilinxprj.sh<br />~ /minsoc/trunk/prj/src/ethmac.prj<br />~ /minsoc/trunk/sim/modelsim/compile_design.bat<br />~ /minsoc/trunk/sim/modelsim/prepare_modelsim.bat<br />~ /minsoc/trunk/sim/modelsim/run_sim.bat<br />~ /minsoc/trunk/sim/modelsim/run_sim.sh<br />~ /minsoc/trunk/sim/run/run_bench<br />~ /minsoc/trunk/sw/utils/bin2hex.c<br />~ /minsoc/trunk/syn/xilinx/setup.bat<br />~ /minsoc/trunk/utils/setup/beautify.sh<br />+ /minsoc/trunk/utils/setup/configure.sh<br />~ /minsoc/trunk/utils/setup/minsoc-install.sh<br />+ /minsoc/trunk/utils/setup/minsoc-setup.sh<br />~ /minsoc/trunk/utils/setup/required-cygwin-tools.txt<br /> rfajardo Tue, 22 Nov 2011 10:46:40 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=141 Installation on Ubuntu-11.10 has shown that package texinfo is required ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=135 <div><strong>Rev 135 - rfajardo</strong> (1 file(s) modified)</div><div>Installation on Ubuntu-11.10 has shown that package texinfo is required ...</div>~ /minsoc/trunk/utils/setup/minsoc-install.sh<br /> rfajardo Mon, 14 Nov 2011 15:12:40 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=135 Scripts updates to correct paths when working under Windows. Now, ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=108 <div><strong>Rev 108 - rfajardo</strong> (4 file(s) modified)</div><div>Scripts updates to correct paths when working under Windows. Now, ...</div>~ /minsoc/trunk/prj/scripts/simverilog.sh<br />~ /minsoc/trunk/prj/scripts/simvhdl.sh<br />~ /minsoc/trunk/prj/scripts/xilinxprj.sh<br />~ /minsoc/trunk/prj/scripts/xilinxxst.sh<br /> rfajardo Wed, 26 Oct 2011 16:48:51 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=108 Adding setup batch script for Altera synthesis on Windows. prj/scripts/altprj.sh ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=107 <div><strong>Rev 107 - rfajardo</strong> (2 file(s) modified)</div><div>Adding setup batch script for Altera synthesis on Windows. <br /> <br /> prj/scripts/altprj.sh ...</div>~ /minsoc/trunk/prj/scripts/altprj.sh<br />+ /minsoc/trunk/syn/altera/setup.bat<br /> rfajardo Wed, 26 Oct 2011 13:49:41 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=107 Installation script was checking the ENV variable before setting it. https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=106 <div><strong>Rev 106 - rfajardo</strong> (1 file(s) modified)</div><div>Installation script was checking the ENV variable before setting it.</div>~ /minsoc/trunk/utils/setup/minsoc-install.sh<br /> rfajardo Wed, 26 Oct 2011 10:57:07 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=106 Updating configure scripts to copy Windows synthesis launch script setup.bat ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=105 <div><strong>Rev 105 - rfajardo</strong> (7 file(s) modified)</div><div>Updating configure scripts to copy Windows synthesis launch script setup.bat ...</div>~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/std/configure<br />- /minsoc/trunk/syn/setup.bat<br />+ /minsoc/trunk/syn/xilinx/setup.bat<br /> rfajardo Wed, 26 Oct 2011 09:09:30 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=105 Enabling modelsim simulation for current project definition. vhdl and verilog projects ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=104 <div><strong>Rev 104 - rfajardo</strong> (7 file(s) modified)</div><div>Enabling modelsim simulation for current project definition.<br /> vhdl and verilog projects ...</div>~ /minsoc/trunk/prj/Makefile<br />- /minsoc/trunk/prj/scripts/simprj.sh<br />+ /minsoc/trunk/prj/scripts/simverilog.sh<br />+ /minsoc/trunk/prj/scripts/simvhdl.sh<br />~ /minsoc/trunk/sim/modelsim/compile_design.bat<br />~ /minsoc/trunk/sim/modelsim/compile_design.sh<br />~ /minsoc/trunk/sim/run/generate_bench<br /> rfajardo Wed, 19 Oct 2011 10:31:39 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=104 But the file is called gdb-6.8a.tar.bz2, so tar must be ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=103 <div><strong>Rev 103 - rfajardo</strong> (1 file(s) modified)</div><div>But the file is called gdb-6.8a.tar.bz2, so tar must be ...</div>~ /minsoc/trunk/utils/setup/minsoc-install.sh<br /> rfajardo Sun, 16 Oct 2011 19:26:39 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=103 GNU GDB FTP has renamed gdb-6.8 package to gdb-6.8a package. ... https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=102 <div><strong>Rev 102 - rfajardo</strong> (1 file(s) modified)</div><div>GNU GDB FTP has renamed gdb-6.8 package to gdb-6.8a package. ...</div>~ /minsoc/trunk/utils/setup/minsoc-install.sh<br /> rfajardo Sun, 16 Oct 2011 19:23:51 +0100 https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2F&rev=102
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