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open8_urisc WebSVN RSS feed - open8_urisc https://opencores.org/websvn//websvn/listing?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F& Sat, 13 Jun 2026 15:43:26 +0100 FeedCreator 1.7.2 Modified the Open8 version of the multi-channel roll average code ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=324 <div><strong>Rev 324 - jshamlet</strong> (2 file(s) modified)</div><div>Modified the Open8 version of the multi-channel roll average code ...</div>~ /open8_urisc/trunk/VHDL/o8_mavg_8ch_16b_64d.vhd<br />+ /open8_urisc/trunk/VHDL/o8_romtape_8k.vhd<br /> jshamlet Thu, 21 Sep 2023 16:30:14 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=324 Forgot to add files https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=323 <div><strong>Rev 323 - jshamlet</strong> (2 file(s) modified)</div><div>Forgot to add files</div>+ /open8_urisc/trunk/VHDL/o8_mavg_8ch_16b_64d.vhd<br />+ /open8_urisc/trunk/VHDL/threshold_comp.vhd<br /> jshamlet Wed, 20 Sep 2023 18:06:38 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=323 Performance fixes for the LCD interface, Fixed incorrect entity name for ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=322 <div><strong>Rev 322 - jshamlet</strong> (5 file(s) modified)</div><div>Performance fixes for the LCD interface,<br /> Fixed incorrect entity name for ...</div>~ /open8_urisc/trunk/VHDL/hd44780_4b.vhd<br />~ /open8_urisc/trunk/VHDL/hd44780_8b.vhd<br />~ /open8_urisc/trunk/VHDL/o8_hd44780_8b.vhd<br />~ /open8_urisc/trunk/VHDL/o8_hd44780_if.vhd<br />~ /open8_urisc/trunk/VHDL/o8_ltc2355_2p.vhd<br /> jshamlet Wed, 20 Sep 2023 18:05:56 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=322 Fixed issue with parity flag in receiver sticking https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=321 <div><strong>Rev 321 - jshamlet</strong> (1 file(s) modified)</div><div>Fixed issue with parity flag in receiver sticking</div>~ /open8_urisc/trunk/VHDL/async_ser_rx.vhd<br /> jshamlet Fri, 09 Jun 2023 00:55:42 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=321 Inverted flow control signals to match EIA-232 specification https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=320 <div><strong>Rev 320 - jshamlet</strong> (1 file(s) modified)</div><div>Inverted flow control signals to match EIA-232 specification</div>~ /open8_urisc/trunk/VHDL/o8_async_serial.vhd<br /> jshamlet Tue, 06 Jun 2023 22:06:10 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=320 Fixed off-by-one error in channel count https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=319 <div><strong>Rev 319 - jshamlet</strong> (1 file(s) modified)</div><div>Fixed off-by-one error in channel count</div>~ /open8_urisc/trunk/VHDL/adc128s022.vhd<br /> jshamlet Mon, 05 Jun 2023 18:52:49 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=319 Added o8_scale_conv.vhd and intdiv.vhd https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=318 <div><strong>Rev 318 - jshamlet</strong> (2 file(s) modified)</div><div>Added o8_scale_conv.vhd and intdiv.vhd</div>+ /open8_urisc/trunk/VHDL/intdiv.vhd<br />+ /open8_urisc/trunk/VHDL/o8_scale_conv.vhd<br /> jshamlet Thu, 01 Jun 2023 16:45:53 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=318 Altered the reinit signal on teh adc128s022.vhd driver to be ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=317 <div><strong>Rev 317 - jshamlet</strong> (2 file(s) modified)</div><div>Altered the reinit signal on teh adc128s022.vhd driver to be ...</div>~ /open8_urisc/trunk/VHDL/adc128s022.vhd<br />~ /open8_urisc/trunk/VHDL/o8_de0_nano_adc_if.vhd<br /> jshamlet Thu, 18 May 2023 20:09:33 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=317 More code cleanup and comments, Removed INT_VECTOR_n constants, as they are ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=316 <div><strong>Rev 316 - jshamlet</strong> (1 file(s) modified)</div><div>More code cleanup and comments,<br /> Removed INT_VECTOR_n constants, as they are ...</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br /> jshamlet Thu, 18 May 2023 20:02:35 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=316 Added Terasic DE0 Nano ADC interface and rolling averager. https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=315 <div><strong>Rev 315 - jshamlet</strong> (6 file(s) modified)</div><div>Added Terasic DE0 Nano ADC interface and rolling averager.</div>+ /open8_urisc/trunk/VHDL/adc128s022.vhd<br />+ /open8_urisc/trunk/VHDL/adc_buffer.vhd<br />+ /open8_urisc/trunk/VHDL/adc_monitor.vhd<br />+ /open8_urisc/trunk/VHDL/mavg_8ch_16b_64d.vhd<br />+ /open8_urisc/trunk/VHDL/mavg_buffer_16b.vhd<br />+ /open8_urisc/trunk/VHDL/o8_de0_nano_adc_if.vhd<br /> jshamlet Thu, 18 May 2023 18:56:10 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=315 Code cleanup and added comments https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=314 <div><strong>Rev 314 - jshamlet</strong> (1 file(s) modified)</div><div>Code cleanup and added comments</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br /> jshamlet Thu, 18 May 2023 17:59:34 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=314 Added all generics to package component https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=313 <div><strong>Rev 313 - jshamlet</strong> (1 file(s) modified)</div><div>Added all generics to package component</div>~ /open8_urisc/trunk/VHDL/Open8_pkg.vhd<br /> jshamlet Thu, 18 May 2023 16:45:18 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=313 Added o8_timer24.vhd as a more flexible alternative to o8_sys_timer_ii.vhd. Also cleaned ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=312 <div><strong>Rev 312 - jshamlet</strong> (4 file(s) modified)</div><div>Added o8_timer24.vhd as a more flexible alternative to o8_sys_timer_ii.vhd.<br /> Also cleaned ...</div>~ /open8_urisc/trunk/Documents/CPU Instruction Set.htm<br />~ /open8_urisc/trunk/Documents/CPU Instruction Set_files/sheet001.htm<br />~ /open8_urisc/trunk/Documents/CPU Instruction Set_files/sheet002.htm<br />+ /open8_urisc/trunk/VHDL/o8_timer24.vhd<br /> jshamlet Thu, 18 May 2023 16:21:47 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=312 Updated documentation to reflect generic switch controlling ROR/ROL behavior and ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=311 <div><strong>Rev 311 - jshamlet</strong> (2 file(s) modified)</div><div>Updated documentation to reflect generic switch controlling ROR/ROL behavior and ...</div>~ /open8_urisc/trunk/Documents/CPU Instruction Set_files/sheet001.htm<br />~ /open8_urisc/trunk/Documents/CPU Instruction Set_files/sheet002.htm<br /> jshamlet Tue, 04 Apr 2023 19:54:29 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=311 Added optional DACadv signal to advance the PWM engine using ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=310 <div><strong>Rev 310 - jshamlet</strong> (1 file(s) modified)</div><div>Added optional DACadv signal to advance the PWM engine using ...</div>~ /open8_urisc/trunk/VHDL/vdsm8.vhd<br /> jshamlet Wed, 08 Mar 2023 14:43:04 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=310 Comment cleanup https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=309 <div><strong>Rev 309 - jshamlet</strong> (1 file(s) modified)</div><div>Comment cleanup</div>~ /open8_urisc/trunk/taskmgr/taskmgr_const.s<br /> jshamlet Sun, 26 Feb 2023 07:08:01 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=309 ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=308 <div><strong>Rev 308 - jshamlet</strong> (1 file(s) modified)</div><div>...</div>~ /open8_urisc/trunk/VHDL/o8_sys_timer_ii.vhd<br /> jshamlet Wed, 15 Feb 2023 00:31:20 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=308 Fixed comments on o8_version.vhd https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=307 <div><strong>Rev 307 - jshamlet</strong> (1 file(s) modified)</div><div>Fixed comments on o8_version.vhd</div>~ /open8_urisc/trunk/VHDL/o8_version.vhd<br /> jshamlet Fri, 22 Jul 2022 14:56:19 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=307 Moved REINIT_TASK_TABLE_PTR call to INITIALIZE_TASK_STACK https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=306 <div><strong>Rev 306 - jshamlet</strong> (1 file(s) modified)</div><div>Moved REINIT_TASK_TABLE_PTR call to INITIALIZE_TASK_STACK</div>~ /open8_urisc/trunk/taskmgr/taskmgr_const.s<br /> jshamlet Mon, 18 Jul 2022 13:14:53 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=306 More code cleanup - rearranged macros and moved stack init ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=305 <div><strong>Rev 305 - jshamlet</strong> (1 file(s) modified)</div><div>More code cleanup - rearranged macros and moved stack init ...</div>~ /open8_urisc/trunk/taskmgr/taskmgr_const.s<br /> jshamlet Mon, 18 Jul 2022 13:11:05 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2F&rev=305

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