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openmsp430 WebSVN RSS feed - openmsp430 https://opencores.org/websvn//websvn/listing?repname=openmsp430&path=%2Fopenmsp430%2Ftrunk%2Fcore%2Fsim%2Frtl_sim%2Fsrc-c%2Fdhrystone_4mcu%2Fomsp_func.c& Thu, 28 Mar 2024 16:32:40 +0100 FeedCreator 1.7.2 Add custom printf function to reduce program memory footprint (the ... https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2Fopenmsp430%2Ftrunk%2Fcore%2Fsim%2Frtl_sim%2Fsrc-c%2Fdhrystone_4mcu%2F&rev=211 <div><strong>Rev 211 - olivier.girard</strong> (38 file(s) modified)</div><div>Add custom printf function to reduce program memory footprint (the ...</div>~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/coremark.h<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/coremark_v1.0.v<br />- /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/copydata.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/core_portme.mak<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/linker.msp430-elf.x<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/linker.msp430.x<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/mylib<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/mylib/copydata.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/mylib/cprintf.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/mylib/cprintf.h<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/omsp_func.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/omsp_func.h<br />- /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/copydata.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/linker.msp430-elf.x<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/makefile<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/mylib<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/mylib/copydata.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/mylib/cprintf.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/mylib/cprintf.h<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/omsp_func.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/omsp_func.h<br />- /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/copydata.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/linker.msp430-elf.x<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/makefile<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/mylib<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/mylib/copydata.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/mylib/cprintf.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/mylib/cprintf.h<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/omsp_func.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/omsp_func.h<br />- /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/copydata.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/linker.msp430-elf.x<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/makefile<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/mylib<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/mylib/copydata.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/mylib/cprintf.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/mylib/cprintf.h<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/omsp_system.h<br /> olivier.girard Tue, 17 Nov 2015 11:03:44 +0100 https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2Fopenmsp430%2Ftrunk%2Fcore%2Fsim%2Frtl_sim%2Fsrc-c%2Fdhrystone_4mcu%2F&rev=211 Add Dhrystone and CoreMark benchmarks to the simulation environment. https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2Fopenmsp430%2Ftrunk%2Fcore%2Fsim%2Frtl_sim%2Fsrc-c%2Fdhrystone_4mcu%2F&rev=145 <div><strong>Rev 145 - olivier.girard</strong> (80 file(s) modified)</div><div>Add Dhrystone and CoreMark benchmarks to the simulation environment.</div>~ /openmsp430/trunk/core/bench/verilog/registers.v<br />~ /openmsp430/trunk/core/sim/rtl_sim/run/run_c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/coremark.h<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/coremark.md5<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/coremark_v1.0.v<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/core_list_join.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/core_main.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/core_matrix.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/core_state.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/core_util.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/docs<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/docs/Coremark-requirements.doc<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/docs/LICENSE.DOC<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/docs/r01an0757eu_rx.pdf<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/LICENSE.txt<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/Makefile<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/core_portme.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/core_portme.h<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/core_portme.mak<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/linker.x<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/omsp_func.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/omsp_func.h<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/readme.txt<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/release_notes.txt<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/dhry.h<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/dhry21a.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/dhry21b.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/dhrystone_4mcu.v<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/linker.x<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/makefile<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/omsp_func.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/omsp_func.h<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/original_files<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/original_files/dhry.h<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/original_files/dhry21a.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/original_files/dhry21b.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/original_files/Dhrystone.pnproj<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/original_files/dhyrstone.pro<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/original_files/estubs.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/original_files/Makefile<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/original_files/ReadMe.txt<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/original_files/timers_b.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/original_files/z8obj<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/dhry.h<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/dhrystone_v2.1.v<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/dhry_1.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/dhry_2.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/doc<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/doc/reu05b0134_rxap.pdf<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/linker.x<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/makefile<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/omsp_func.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/omsp_func.h<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/bymanuf<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/byperf<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/cc_dry2<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/cc_dry2reg<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/clarify.doc<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/dhry-2.1.p<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/dhry.h<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/dhry.p<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/dhry_1.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/dhry_2.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/dhry_c.dif<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/doit<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/Makefile<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/pure2_1.dif<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/RATIONALE<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/README<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/README.RER<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/results<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/original_files/submit.frm<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/linker.x<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/sandbox.v<br />~ /openmsp430/trunk/core/sim/rtl_sim/src/ldscript_example.x<br /> olivier.girard Wed, 30 May 2012 21:03:05 +0100 https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2Fopenmsp430%2Ftrunk%2Fcore%2Fsim%2Frtl_sim%2Fsrc-c%2Fdhrystone_4mcu%2F&rev=145
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