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            <br /><b>Error creating feed file, please check write permissions.</b><br /><?xml version="1.0" encoding="ISO-8859-1"?>
<!-- generator="FeedCreator 1.7.2" -->
<rss version="2.0">
    <channel>
        <title>openrisc</title>
        <description>WebSVN RSS feed - openrisc</description>
        <link>https://opencores.org/websvn//websvn/listing?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;</link>
        <lastBuildDate>Fri, 10 Apr 2026 19:11:01 +0100</lastBuildDate>
        <generator>FeedCreator 1.7.2</generator>
        <item>
            <title>Missing parts of checkin from revision 515. Version now 1.0rc4.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=518</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 518 - julius&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;Missing parts of checkin from revision 515. Version now 1.0rc4.&lt;/div&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/BASE-VER&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.md&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Sun, 10 Apr 2011 16:23:47 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=518</guid>
        </item>
        <item>
            <title>newlib updates with or1k support functions, libgloss cleanup</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=517</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 517 - julius&lt;/strong&gt; (21 file(s) modified)&lt;/div&gt;&lt;div&gt;newlib updates with or1k support functions, libgloss cleanup&lt;/div&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/crt0.S&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/fstat.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/isatty.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/lseek.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/Makefile.in&lt;br /&gt;- /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/or1k-support.h&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/read.c&lt;br /&gt;- /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/spr-defs.h&lt;br /&gt;- /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/uart-dummy.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/uart.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/write.c&lt;br /&gt;- /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/_cache.S&lt;br /&gt;- /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/_exception_handler.S&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/_exit.c&lt;br /&gt;- /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/_interrupt_handler.S&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/newlib/libc/machine/or32/include&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/newlib/libc/machine/or32/include/or1k-newlib-support.h&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/newlib/libc/machine/or32/include/spr-defs.h&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/newlib/libc/machine/or32/Makefile.in&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/newlib/libc/machine/or32/or1k-support-asm.S&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/newlib/libc/machine/or32/or1k-support.c&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Sat, 09 Apr 2011 22:48:26 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=517</guid>
        </item>
        <item>
            <title>Minor synch with recent changes by Joern.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=515</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 515 - jeremybennett&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Minor synch with recent changes by Joern.&lt;/div&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/ChangeLog.or32&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.h&lt;br /&gt;</description>
            <author>jeremybennett</author>
            <pubDate>Sat, 09 Apr 2011 16:05:32 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=515</guid>
        </item>
        <item>
            <title>Changes for version 1.0rc3 for OpenRISC 1000. Various bugs and ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=514</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 514 - jeremybennett&lt;/strong&gt; (13 file(s) modified)&lt;/div&gt;&lt;div&gt;Changes for version 1.0rc3 for OpenRISC 1000. Various bugs and ...&lt;/div&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/BASE-VER&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/ChangeLog.or32&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.h&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/gcc.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/ChangeLog.or32&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/c99-stdint-1.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/c99-stdint-2.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/lib/profopt.exp&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/lib/target-supports.exp&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/libstdc++-v3/ChangeLog.or32&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/libstdc++-v3/testsuite/18_support/numeric_limits/lowest.cc&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/libstdc++-v3/testsuite/21_strings/basic_string/requirements/typedefs.cc&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/libstdc++-v3/testsuite/ext/profile/mh.cc&lt;br /&gt;</description>
            <author>jeremybennett</author>
            <pubDate>Sat, 09 Apr 2011 13:19:40 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=514</guid>
        </item>
        <item>
            <title>Updates for release 1.0rc3 for the OpenRISC 1000.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=512</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 512 - jeremybennett&lt;/strong&gt; (18 file(s) modified)&lt;/div&gt;&lt;div&gt;Updates for release 1.0rc3 for the OpenRISC 1000.&lt;/div&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/bfd/doc/bfd.info&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/bfd/doc/reloc.texi&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/ChangeLog.or32&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/doc/gdb.info&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/doc/gdb.info-1&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/doc/gdb.info-2&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/doc/gdb.info-3&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/doc/gdb.info-4&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/doc/gdb.info-5&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/doc/gdb.info-6&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/doc/GDBvn.texi&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/gdbserver/ChangeLog.or32&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/gdbserver/configure.srv&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/gdbserver/linux-or32-low.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/gdbserver/Makefile.in&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/NEWS.or32&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/po/gdb.pot&lt;br /&gt;~ /openrisc/trunk/gnu-src/gdb-7.2/gdb/version.in&lt;br /&gt;</description>
            <author>jeremybennett</author>
            <pubDate>Sat, 09 Apr 2011 10:05:48 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=512</guid>
        </item>
        <item>
            <title>Updates for release 0.5.1rc1.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=510</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 510 - jeremybennett&lt;/strong&gt; (9 file(s) modified)&lt;/div&gt;&lt;div&gt;Updates for release 0.5.1rc1.&lt;/div&gt;~ /openrisc/trunk/or1ksim/ChangeLog&lt;br /&gt;~ /openrisc/trunk/or1ksim/configure&lt;br /&gt;~ /openrisc/trunk/or1ksim/configure.ac&lt;br /&gt;~ /openrisc/trunk/or1ksim/doc/or1ksim.info&lt;br /&gt;~ /openrisc/trunk/or1ksim/doc/version.texi&lt;br /&gt;~ /openrisc/trunk/or1ksim/NEWS&lt;br /&gt;~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog&lt;br /&gt;~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure&lt;br /&gt;~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac&lt;br /&gt;</description>
            <author>jeremybennett</author>
            <pubDate>Fri, 08 Apr 2011 10:58:58 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=510</guid>
        </item>
        <item>
            <title>Updates for Or1ksim 0.5.0rc3.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=508</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 508 - jeremybennett&lt;/strong&gt; (14 file(s) modified)&lt;/div&gt;&lt;div&gt;Updates for Or1ksim 0.5.0rc3.&lt;/div&gt;+ /openrisc/trunk/or1ksim/brend-static.sh&lt;br /&gt;~ /openrisc/trunk/or1ksim/brend.sh&lt;br /&gt;+ /openrisc/trunk/or1ksim/brstart-static.sh&lt;br /&gt;~ /openrisc/trunk/or1ksim/ChangeLog&lt;br /&gt;~ /openrisc/trunk/or1ksim/configure&lt;br /&gt;~ /openrisc/trunk/or1ksim/configure.ac&lt;br /&gt;~ /openrisc/trunk/or1ksim/cpu/or1k/sprs.c&lt;br /&gt;~ /openrisc/trunk/or1ksim/doc/or1ksim.info&lt;br /&gt;~ /openrisc/trunk/or1ksim/doc/or1ksim.texi&lt;br /&gt;~ /openrisc/trunk/or1ksim/NEWS&lt;br /&gt;~ /openrisc/trunk/or1ksim/peripheral/eth.c&lt;br /&gt;~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog&lt;br /&gt;~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure&lt;br /&gt;~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac&lt;br /&gt;</description>
            <author>jeremybennett</author>
            <pubDate>Thu, 07 Apr 2011 11:09:33 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=508</guid>
        </item>
        <item>
            <title>Newlib libgloss board support update. Corresponding GCC port changes to ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=507</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 507 - julius&lt;/strong&gt; (28 file(s) modified)&lt;/div&gt;&lt;div&gt;Newlib libgloss board support update. Corresponding GCC port changes to ...&lt;/div&gt;~ /openrisc/trunk/gnu-src/boards/or32-elf-sim.exp&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.h&lt;br /&gt;~ /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.opt&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/crt0.S&lt;br /&gt;- /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/fstat-uart.c&lt;br /&gt;/openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/fstat.c&lt;br /&gt;- /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/isatty-uart.c&lt;br /&gt;/openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/isatty.c&lt;br /&gt;- /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/lseek-uart.c&lt;br /&gt;/openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/lseek.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/Makefile.in&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/ml501.S&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/or1k-support.h&lt;br /&gt;- /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/or1ksim-board.h&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/or1ksim-uart.S&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/or1ksim.S&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/ordb1a3pe1500.S&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/orpsocrefdesign.S&lt;br /&gt;- /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/read-uart.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/read.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/sim.cfg&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/uart.c&lt;br /&gt;- /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/write-uart.c&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/write.c&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/_cache.S&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/_exception_handler.S&lt;br /&gt;~ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/_exit.c&lt;br /&gt;+ /openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/_interrupt_handler.S&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Fri, 01 Apr 2011 14:28:52 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=507</guid>
        </item>
        <item>
            <title>ORPSoC or1200 interrupt and syscall generation test</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=506</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 506 - julius&lt;/strong&gt; (9 file(s) modified)&lt;/div&gt;&lt;div&gt;ORPSoC or1200 interrupt and syscall generation test&lt;/div&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/arbiter/arbiter_bytebus.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/include/orpsoc-defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/include/orpsoc-params.v&lt;br /&gt;+ /openrisc/trunk/orpsocv2/rtl/verilog/intgen&lt;br /&gt;+ /openrisc/trunk/orpsocv2/rtl/verilog/intgen/intgen.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/orpsoc_top/orpsoc_top.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/sw/board/include/board.h&lt;br /&gt;~ /openrisc/trunk/orpsocv2/sw/Makefile.inc&lt;br /&gt;+ /openrisc/trunk/orpsocv2/sw/tests/or1200/sim/or1200-intsyscall.S&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Thu, 31 Mar 2011 15:16:20 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=506</guid>
        </item>
        <item>
            <title>OR1200 overflow detection fixup

SPIflash program update

or1200 driver library timer improvement</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=505</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 505 - julius&lt;/strong&gt; (5 file(s) modified)&lt;/div&gt;&lt;div&gt;OR1200 overflow detection fixup&lt;br /&gt;
&lt;br /&gt;
SPIflash program update&lt;br /&gt;
&lt;br /&gt;
or1200 driver library timer improvement&lt;/div&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_mult_mac.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/sw/apps/spiflash/README&lt;br /&gt;~ /openrisc/trunk/orpsocv2/sw/apps/spiflash/spiflash-program.ld&lt;br /&gt;~ /openrisc/trunk/orpsocv2/sw/drivers/or1200/or1200-utils.c&lt;br /&gt;~ /openrisc/trunk/orpsocv2/sw/drivers/simple-spi/simple-spi.c&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Thu, 31 Mar 2011 14:43:17 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=505</guid>
        </item>
        <item>
            <title>ORPSoC ALU update with new comparison configuration option, software test ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=504</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 504 - julius&lt;/strong&gt; (4 file(s) modified)&lt;/div&gt;&lt;div&gt;ORPSoC ALU update with new comparison configuration option, software test ...&lt;/div&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/include/or1200_defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_alu.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_rf.v&lt;br /&gt;+ /openrisc/trunk/orpsocv2/sw/tests/or1200/sim/or1200-sf.S&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Mon, 14 Mar 2011 18:51:14 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=504</guid>
        </item>
        <item>
            <title>ORPSoC's or1200 defines fix to indicate we don't actually have ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=503</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 503 - julius&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;ORPSoC's or1200 defines fix to indicate we don't actually have ...&lt;/div&gt;~ /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/rtl/verilog/include/or1200_defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/or1200_defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/include/or1200_defines.v&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Sun, 13 Mar 2011 22:49:48 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=503</guid>
        </item>
        <item>
            <title>ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=502</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 502 - julius&lt;/strong&gt; (14 file(s) modified)&lt;/div&gt;&lt;div&gt;ORPSoC update - or1200, ethmac Xilinx fifos&lt;br /&gt;
or1200 in ORPSoC has ...&lt;/div&gt;~ /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/rtl/verilog/include/or1200_defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/ethmac_defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/or1200_defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/uart_defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/ethmac/eth_fifo.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/include/or1200_defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_alu.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_cpu.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_except.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_mult_mac.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_sprs.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/sim/bin/Makefile&lt;br /&gt;+ /openrisc/trunk/orpsocv2/sw/tests/or1200/sim/or1200-cy.S&lt;br /&gt;+ /openrisc/trunk/orpsocv2/sw/tests/or1200/sim/or1200-ov.S&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Fri, 11 Mar 2011 18:47:48 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=502</guid>
        </item>
        <item>
            <title>ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=501</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 501 - julius&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.&lt;br /&gt;
ORPSoC or1200 defines ...&lt;/div&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/include/or1200_defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_mult_mac.v&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Thu, 10 Mar 2011 18:19:40 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=501</guid>
        </item>
        <item>
            <title>ORPSoC's System C UART model can now accept input from ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=500</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 500 - julius&lt;/strong&gt; (5 file(s) modified)&lt;/div&gt;&lt;div&gt;ORPSoC's System C UART model can now accept input from ...&lt;/div&gt;~ /openrisc/trunk/orpsocv2/bench/sysc/include/UartSC.h&lt;br /&gt;~ /openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocMain.cpp&lt;br /&gt;~ /openrisc/trunk/orpsocv2/bench/sysc/src/UartSC.cpp&lt;br /&gt;~ /openrisc/trunk/orpsocv2/boards/xilinx/ml501/sim/bin/Makefile&lt;br /&gt;~ /openrisc/trunk/orpsocv2/sim/bin/Makefile&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Thu, 10 Mar 2011 15:22:20 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=500</guid>
        </item>
        <item>
            <title>ORPSoC OR1200 updates - added l.ext instructions with tests, ammended ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=499</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 499 - julius&lt;/strong&gt; (12 file(s) modified)&lt;/div&gt;&lt;div&gt;ORPSoC OR1200 updates - added l.ext instructions with tests, ammended ...&lt;/div&gt;~ /openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/rtl/verilog/include/or1200_defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/or1200_defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/include/or1200_defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_alu.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_cpu.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_ctrl.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_freeze.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_mult_mac.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/sim/bin/Makefile&lt;br /&gt;+ /openrisc/trunk/orpsocv2/sw/tests/or1200/sim/or1200-ext.S&lt;br /&gt;~ /openrisc/trunk/orpsocv2/sw/tests/or1200/sim/or1200-ffl1.S&lt;br /&gt;~ /openrisc/trunk/orpsocv2/sw/tests/or1200/sim/or1200-mac.S&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Wed, 09 Mar 2011 22:18:11 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=499</guid>
        </item>
        <item>
            <title>or_debug_proxy updates to documentation and Makefile related to latest ftd2xx ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=498</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 498 - julius&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;or_debug_proxy updates to documentation and Makefile related to latest ftd2xx ...&lt;/div&gt;~ /openrisc/trunk/or_debug_proxy/ChangeLog&lt;br /&gt;~ /openrisc/trunk/or_debug_proxy/Makefile&lt;br /&gt;~ /openrisc/trunk/or_debug_proxy/README&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Tue, 08 Mar 2011 09:30:07 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=498</guid>
        </item>
        <item>
            <title>or_debug_proxy updates</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=497</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 497 - julius&lt;/strong&gt; (5 file(s) modified)&lt;/div&gt;&lt;div&gt;or_debug_proxy updates&lt;/div&gt;~ /openrisc/trunk/or_debug_proxy/ChangeLog&lt;br /&gt;~ /openrisc/trunk/or_debug_proxy/includes/gdb.h&lt;br /&gt;~ /openrisc/trunk/or_debug_proxy/README&lt;br /&gt;~ /openrisc/trunk/or_debug_proxy/src/gdb.c&lt;br /&gt;~ /openrisc/trunk/or_debug_proxy/src/or_debug_proxy.c&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Mon, 07 Mar 2011 13:18:49 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=497</guid>
        </item>
        <item>
            <title>ORPSoC ml501 updates - increased frequency, updated documentation</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=496</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 496 - julius&lt;/strong&gt; (6 file(s) modified)&lt;/div&gt;&lt;div&gt;ORPSoC ml501 updates - increased frequency, updated documentation&lt;/div&gt;~ /openrisc/trunk/orpsocv2/boards/xilinx/ml501/backend/par/bin/ml501.ucf&lt;br /&gt;~ /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/clkgen/clkgen.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/uart_defines.v&lt;br /&gt;~ /openrisc/trunk/orpsocv2/boards/xilinx/ml501/sw/board/include/board.h&lt;br /&gt;~ /openrisc/trunk/orpsocv2/doc/orpsoc.texi&lt;br /&gt;~ /openrisc/trunk/orpsocv2/sw/tests/ethmac/board/ethmac-ping.c&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Mon, 07 Mar 2011 11:52:26 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=496</guid>
        </item>
        <item>
            <title>ORPSoC adding more accessor functions to Micron SDRAM model.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=495</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 495 - julius&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;ORPSoC adding more accessor functions to Micron SDRAM model.&lt;/div&gt;~ /openrisc/trunk/orpsocv2/bench/verilog/mt48lc16m16a2.v&lt;br /&gt;</description>
            <author>julius</author>
            <pubDate>Mon, 07 Mar 2011 11:44:55 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2F&amp;rev=495</guid>
        </item>
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