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openrisc
WebSVN RSS feed - openrisc
https://opencores.org/websvn//websvn/listing?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&
Sat, 14 Mar 2026 01:50:41 +0100
FeedCreator 1.7.2
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Missing file to fix bug 1797.
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=144
<div><strong>Rev 144 - jeremybennett</strong> (1 file(s) modified)</div><div>Missing file to fix bug 1797.</div>~ /openrisc/trunk/or1ksim/argtable2/argtable2.c<br />
jeremybennett
Wed, 30 Jun 2010 16:20:23 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=144
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Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix ...
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=143
<div><strong>Rev 143 - jeremybennett</strong> (16 file(s) modified)</div><div>Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix ...</div>~ /openrisc/trunk/or1ksim/argtable2/argtable2.c<br />~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/configure.ac<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/debug/rsp-server.c<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/libtoplevel.c<br />~ /openrisc/trunk/or1ksim/NEWS<br />~ /openrisc/trunk/or1ksim/or1ksim.h<br />~ /openrisc/trunk/or1ksim/sim-config.c<br />~ /openrisc/trunk/or1ksim/sim-config.h<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac<br />
jeremybennett
Wed, 30 Jun 2010 14:32:06 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=143
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Updates for stable release 0.4.0
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=134
<div><strong>Rev 134 - jeremybennett</strong> (10 file(s) modified)</div><div>Updates for stable release 0.4.0</div>~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/configure.ac<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/NEWS<br />~ /openrisc/trunk/or1ksim/README<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac<br />
jeremybennett
Tue, 22 Jun 2010 10:49:28 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=134
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New config option to allow l.xori with unsigned operand.
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=127
<div><strong>Rev 127 - jeremybennett</strong> (14 file(s) modified)</div><div>New config option to allow l.xori with unsigned operand.</div>~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/config.h.in<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/configure.ac<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/or32.c<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.texi<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/NEWS<br />~ /openrisc/trunk/or1ksim/README<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac<br />
jeremybennett
Wed, 16 Jun 2010 14:23:06 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=127
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Overflow handling now in line with architecture manual. Tests added.
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=124
<div><strong>Rev 124 - jeremybennett</strong> (22 file(s) modified)</div><div>Overflow handling now in line with architecture manual. Tests added.</div>~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/config.h.in<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/configure.ac<br />~ /openrisc/trunk/or1ksim/cpu/common/execute.h<br />~ /openrisc/trunk/or1ksim/cpu/or32/execute.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.texi<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/NEWS<br />~ /openrisc/trunk/or1ksim/testsuite/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/inst-set-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/README<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-and-test.S<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-or-test.S<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-shift-test.S<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-sub-test.S<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-xor-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in<br />
jeremybennett
Tue, 15 Jun 2010 18:41:00 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=124
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Implementation of l.mfspr and l.mtspr corrected to use bitwise OR ...
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=123
<div><strong>Rev 123 - jeremybennett</strong> (14 file(s) modified)</div><div>Implementation of l.mfspr and l.mtspr corrected to use bitwise OR ...</div>~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/configure.ac<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/NEWS<br />~ /openrisc/trunk/or1ksim/testsuite/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/inst-set-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/README<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-spr-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in<br />
jeremybennett
Tue, 15 Jun 2010 14:41:31 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=123
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Added l.ror and l.rori with associated tests.
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=122
<div><strong>Rev 122 - jeremybennett</strong> (12 file(s) modified)</div><div>Added l.ror and l.rori with associated tests.</div>~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/or32.c<br />~ /openrisc/trunk/or1ksim/NEWS<br />~ /openrisc/trunk/or1ksim/testsuite/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/inst-set-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/README<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-ror-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in<br />
jeremybennett
Mon, 14 Jun 2010 18:41:26 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=122
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Adds exception handling to l.jalr and l.jr. Adds appropriate tests.
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=121
<div><strong>Rev 121 - jeremybennett</strong> (88 file(s) modified)</div><div>Adds exception handling to l.jalr and l.jr. Adds appropriate tests.</div>~ /openrisc/trunk/or1ksim/aclocal.m4<br />~ /openrisc/trunk/or1ksim/argtable2/Makefile.in<br />~ /openrisc/trunk/or1ksim/bpb/Makefile.in<br />~ /openrisc/trunk/or1ksim/cache/Makefile.in<br />~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/config.h.in<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/configure.ac<br />~ /openrisc/trunk/or1ksim/cpu/common/Makefile.in<br />~ /openrisc/trunk/or1ksim/cpu/dlx/Makefile.in<br />~ /openrisc/trunk/or1ksim/cpu/Makefile.in<br />~ /openrisc/trunk/or1ksim/cpu/or1k/Makefile.in<br />~ /openrisc/trunk/or1ksim/cpu/or32/generate.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/Makefile.in<br />~ /openrisc/trunk/or1ksim/cuc/Makefile.in<br />~ /openrisc/trunk/or1ksim/debug/Makefile.in<br />~ /openrisc/trunk/or1ksim/doc/Makefile.in<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/Makefile.in<br />~ /openrisc/trunk/or1ksim/mmu/Makefile.in<br />~ /openrisc/trunk/or1ksim/NEWS<br />~ /openrisc/trunk/or1ksim/peripheral/channels/Makefile.in<br />~ /openrisc/trunk/or1ksim/peripheral/Makefile.in<br />~ /openrisc/trunk/or1ksim/pic/Makefile.in<br />~ /openrisc/trunk/or1ksim/pm/Makefile.in<br />~ /openrisc/trunk/or1ksim/port/Makefile.in<br />~ /openrisc/trunk/or1ksim/support/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/config/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/lib/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/libsim.tests/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/inst-set-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/README<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/aclocal.m4<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/acv-gpio/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/acv-uart/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/basic/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/cache/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/cbasic/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/cfg/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/config.h.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/dhry/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/dmatest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/eth/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/except-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/except/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/exit/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ext/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/fbtest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/flag/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/fp/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/functest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/inst-set-test.S<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-jump-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/int-logger/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/int-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/kbdtest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/local-global/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/loop/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-async/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-common/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-ssram/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-sync/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mem-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mmu/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mul/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mycompress/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/support/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/tick/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/uos/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/upcalls/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/lib-iftest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/lib-inttest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/lib-jtag/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/lib-upcalls/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/Makefile.in<br />~ /openrisc/trunk/or1ksim/tick/Makefile.in<br />~ /openrisc/trunk/or1ksim/vapi/Makefile.in<br />
jeremybennett
Mon, 14 Jun 2010 18:01:01 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=121
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New tests of multiply. Improved tests of exception handling for ...
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=118
<div><strong>Rev 118 - jeremybennett</strong> (95 file(s) modified)</div><div>New tests of multiply. Improved tests of exception handling for ...</div>~ /openrisc/trunk/or1ksim/aclocal.m4<br />~ /openrisc/trunk/or1ksim/argtable2/Makefile.in<br />~ /openrisc/trunk/or1ksim/bpb/Makefile.in<br />~ /openrisc/trunk/or1ksim/cache/Makefile.in<br />~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/config.h.in<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/configure.ac<br />~ /openrisc/trunk/or1ksim/cpu/common/Makefile.in<br />~ /openrisc/trunk/or1ksim/cpu/dlx/Makefile.in<br />~ /openrisc/trunk/or1ksim/cpu/Makefile.in<br />~ /openrisc/trunk/or1ksim/cpu/or1k/Makefile.in<br />~ /openrisc/trunk/or1ksim/cpu/or32/generate.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/Makefile.in<br />~ /openrisc/trunk/or1ksim/cpu/or32/or32.c<br />~ /openrisc/trunk/or1ksim/cuc/Makefile.in<br />~ /openrisc/trunk/or1ksim/debug/Makefile.in<br />~ /openrisc/trunk/or1ksim/doc/Makefile.in<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/Makefile.in<br />~ /openrisc/trunk/or1ksim/mmu/Makefile.in<br />~ /openrisc/trunk/or1ksim/NEWS<br />~ /openrisc/trunk/or1ksim/peripheral/channels/Makefile.in<br />~ /openrisc/trunk/or1ksim/peripheral/Makefile.in<br />~ /openrisc/trunk/or1ksim/pic/Makefile.in<br />~ /openrisc/trunk/or1ksim/pm/Makefile.in<br />~ /openrisc/trunk/or1ksim/port/Makefile.in<br />~ /openrisc/trunk/or1ksim/support/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/config/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/lib/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/libsim.tests/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/inst-set-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/README<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/aclocal.m4<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/acv-gpio/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/acv-uart/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/basic/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/cache/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/cbasic/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/cfg/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/config.h.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/dhry/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/dmatest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/eth/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/except-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/except/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/exit/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ext/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/fbtest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/flag/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/fp/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/functest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/inst-set-test.h<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/inst-set-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-add-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-div-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-find-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-lws-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-mac-test.S<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-mul-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/int-logger/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/int-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/kbdtest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/local-global/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/loop/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-async/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-common/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-ssram/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-sync/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mem-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mmu/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mul/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mycompress/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/support/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/tick/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/uos/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/upcalls/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/lib-iftest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/lib-inttest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/lib-jtag/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/lib-upcalls/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/Makefile.in<br />~ /openrisc/trunk/or1ksim/tick/Makefile.in<br />~ /openrisc/trunk/or1ksim/vapi/Makefile.in<br />
jeremybennett
Sun, 13 Jun 2010 21:07:24 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=118
-
Updated to fix l.maci and add tests for l.mac, l.maci, ...
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=116
<div><strong>Rev 116 - jeremybennett</strong> (23 file(s) modified)</div><div>Updated to fix l.maci and add tests for l.mac, l.maci, ...</div>~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/configure.ac<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/or32.c<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/NEWS<br />~ /openrisc/trunk/or1ksim/testsuite/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/inst-set-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/mul.exp<br />~ /openrisc/trunk/or1ksim/testsuite/README<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/inst-set-test.h<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/inst-set-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-add-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-div-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-find-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-lws-test.S<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-mac-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mul/mul.c<br />
jeremybennett
Fri, 11 Jun 2010 18:03:40 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=116
-
Added support for l.fl1 and tests for l.ff1 and l.fl1
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=115
<div><strong>Rev 115 - jeremybennett</strong> (13 file(s) modified)</div><div>Added support for l.fl1 and tests for l.ff1 and l.fl1</div>~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/or32.c<br />~ /openrisc/trunk/or1ksim/NEWS<br />~ /openrisc/trunk/or1ksim/testsuite/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/inst-set-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/README<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-add-test.S<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-find-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in<br />
jeremybennett
Thu, 10 Jun 2010 18:11:07 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=115
-
l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. ...
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=114
<div><strong>Rev 114 - jeremybennett</strong> (9 file(s) modified)</div><div>l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. ...</div>~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/or32.c<br />~ /openrisc/trunk/or1ksim/NEWS<br />~ /openrisc/trunk/or1ksim/testsuite/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/inst-set-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/README<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-add-test.S<br />
jeremybennett
Thu, 10 Jun 2010 17:08:33 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=114
-
Tidy ups to Ethernet test fixes. new tests for l.add. ...
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=112
<div><strong>Rev 112 - jeremybennett</strong> (28 file(s) modified)</div><div>Tidy ups to Ethernet test fixes. new tests for l.add. ...</div>~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/config.h.in<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/configure.ac<br />~ /openrisc/trunk/or1ksim/cpu/common/execute.h<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.texi<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/peripheral/Makefile.am<br />~ /openrisc/trunk/or1ksim/peripheral/Makefile.in<br />+ /openrisc/trunk/or1ksim/peripheral/mc-defines.h<br />~ /openrisc/trunk/or1ksim/peripheral/mc.h<br />- /openrisc/trunk/or1ksim/peripheral/mc_defines.h<br />~ /openrisc/trunk/or1ksim/testsuite/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/inst-set-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/README<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/eth/fields.h<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/eth/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/eth/Makefile.in<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-add-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-async/mc-async.c<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram/mc-dram.c<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-ssram/mc-ssram.c<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-sync/mc-sync.c<br />
jeremybennett
Wed, 09 Jun 2010 18:24:44 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=112
-
or1ksim make check should work without a libc in the ...
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=110
<div><strong>Rev 110 - julius</strong> (12 file(s) modified)</div><div>or1ksim make check should work without a libc in the ...</div>~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/peripheral/mc.h<br />+ /openrisc/trunk/or1ksim/peripheral/mc_defines.h<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/eth/eth.h<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/eth/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-async/mc-async.c<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram/mc-dram.c<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-ssram/mc-ssram.c<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-sync/mc-sync.c<br />
julius
Tue, 08 Jun 2010 16:58:29 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=110
-
New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) ...
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=107
<div><strong>Rev 107 - jeremybennett</strong> (26 file(s) modified)</div><div>New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) ...</div>~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/configure.ac<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/NEWS<br />~ /openrisc/trunk/or1ksim/testsuite/ChangeLog<br />+ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/inst-set-test.cfg<br />+ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/inst-set-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/README<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/inst-set-test-old.c<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/inst-set-test.h<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/inst-set-test.ld<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/inst-set-test.S<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-div-test.S<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-lws-test.S<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/Makefile.in<br />
jeremybennett
Sun, 06 Jun 2010 17:42:32 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=107
-
Removing old tests, pending addition of new ones.
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=106
<div><strong>Rev 106 - jeremybennett</strong> (3 file(s) modified)</div><div>Removing old tests, pending addition of new ones.</div>- /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/lws-test.exp<br />- /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/inst-set-test.c<br />- /openrisc/trunk/or1ksim/testsuite/test-code-or1k/lws-test<br />
jeremybennett
Sun, 06 Jun 2010 17:40:22 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=106
-
Candidate release 0.4.0rc4
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=104
<div><strong>Rev 104 - jeremybennett</strong> (55 file(s) modified)</div><div>Candidate release 0.4.0rc4</div>~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/configure.ac<br />~ /openrisc/trunk/or1ksim/cpu/or32/generate.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/or32.c<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.texi<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/NEWS<br />~ /openrisc/trunk/or1ksim/peripheral/mc.c<br />~ /openrisc/trunk/or1ksim/README<br />~ /openrisc/trunk/or1ksim/testsuite/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/lib/or1ksim.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/basic.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/cache.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/cbasic.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/cfg.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/dhry.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/dmatest.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/eth.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/except-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/exit.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/ext.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/fbtest.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/flag.exp<br />+ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/fp.cfg<br />+ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/fp.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/functest.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/int-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/kbdtest.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/local-global.exp<br />+ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/lws-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/mem-test.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/mmu.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/mul.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/mycompress.exp<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/tick.exp<br />~ /openrisc/trunk/or1ksim/testsuite/README<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure.ac<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/fp<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/fp/fp.S<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/fp/Makefile.am<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/fp/Makefile.in<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/lws-test<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/lws-test/lws-test.S<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/lws-test/Makefile.am<br />+ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/lws-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/Makefile.am<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/lib-jtag/lib-jtag-full.c<br />
jeremybennett
Thu, 03 Jun 2010 10:22:44 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=104
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ChangeLog updated for floating point support. Fixed bug in generic ...
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=101
<div><strong>Rev 101 - jeremybennett</strong> (79 file(s) modified)</div><div>ChangeLog updated for floating point support. Fixed bug in generic ...</div>~ /openrisc/trunk/or1ksim/aclocal.m4<br />~ /openrisc/trunk/or1ksim/argtable2/Makefile.in<br />~ /openrisc/trunk/or1ksim/bpb/Makefile.in<br />~ /openrisc/trunk/or1ksim/cache/Makefile.in<br />~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/config.h.in<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/configure.ac<br />~ /openrisc/trunk/or1ksim/cpu/common/abstract.c<br />~ /openrisc/trunk/or1ksim/cpu/common/labels.c<br />~ /openrisc/trunk/or1ksim/cpu/common/Makefile.in<br />~ /openrisc/trunk/or1ksim/cpu/dlx/Makefile.in<br />~ /openrisc/trunk/or1ksim/cpu/Makefile.in<br />~ /openrisc/trunk/or1ksim/cpu/or1k/Makefile.in<br />~ /openrisc/trunk/or1ksim/cpu/or32/Makefile.in<br />~ /openrisc/trunk/or1ksim/cuc/Makefile.in<br />~ /openrisc/trunk/or1ksim/debug/Makefile.in<br />~ /openrisc/trunk/or1ksim/doc/Makefile.in<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.texi<br />~ /openrisc/trunk/or1ksim/Makefile.in<br />~ /openrisc/trunk/or1ksim/mmu/Makefile.in<br />~ /openrisc/trunk/or1ksim/peripheral/channels/Makefile.in<br />~ /openrisc/trunk/or1ksim/peripheral/generic.c<br />~ /openrisc/trunk/or1ksim/peripheral/Makefile.in<br />~ /openrisc/trunk/or1ksim/pic/Makefile.in<br />~ /openrisc/trunk/or1ksim/pm/Makefile.in<br />~ /openrisc/trunk/or1ksim/port/Makefile.in<br />~ /openrisc/trunk/or1ksim/support/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/config/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/lib/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/libsim.tests/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/or1ksim.tests/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/aclocal.m4<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/acv-gpio/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/acv-uart/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/basic/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/cache/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/cbasic/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/cfg/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/config.h.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/dhry/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/dmatest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/eth/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/except-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/except/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/exit/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ext/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/fbtest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/flag/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/functest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/int-logger/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/int-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/kbdtest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/local-global/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/loop/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-async/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-common/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-ssram/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-sync/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mem-test/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mmu/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mul/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mycompress/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/support/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/tick/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/uos/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code-or1k/upcalls/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/lib-iftest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/lib-inttest/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/lib-jtag/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/lib-upcalls/Makefile.in<br />~ /openrisc/trunk/or1ksim/testsuite/test-code/Makefile.in<br />~ /openrisc/trunk/or1ksim/tick/Makefile.in<br />~ /openrisc/trunk/or1ksim/vapi/Makefile.in<br />
jeremybennett
Tue, 25 May 2010 16:27:58 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=101
-
Single precision FPU stuff for or1ksim
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=100
<div><strong>Rev 100 - julius</strong> (11 file(s) modified)</div><div>Single precision FPU stuff for or1ksim</div>~ /openrisc/trunk/or1ksim/cpu-config.c<br />~ /openrisc/trunk/or1ksim/cpu/common/labels.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/generate.c<br />~ /openrisc/trunk/or1ksim/cpu/or32/insnset.c<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.texi<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/profiler.c<br />~ /openrisc/trunk/or1ksim/profiler.h<br />~ /openrisc/trunk/or1ksim/sim-config.c<br />~ /openrisc/trunk/or1ksim/sim-config.h<br />
julius
Tue, 25 May 2010 14:16:18 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=100
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Bug in test evaluation for library fixed.
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=99
<div><strong>Rev 99 - jeremybennett</strong> (8 file(s) modified)</div><div>Bug in test evaluation for library fixed.</div>~ /openrisc/trunk/or1ksim/ChangeLog<br />~ /openrisc/trunk/or1ksim/configure<br />~ /openrisc/trunk/or1ksim/configure.ac<br />~ /openrisc/trunk/or1ksim/doc/or1ksim.info<br />~ /openrisc/trunk/or1ksim/doc/version.texi<br />~ /openrisc/trunk/or1ksim/testsuite/ChangeLog<br />~ /openrisc/trunk/or1ksim/testsuite/lib/libsim.exp<br />~ /openrisc/trunk/or1ksim/testsuite/libsim.tests/jtag-write-command.exp<br />
jeremybennett
Thu, 20 May 2010 16:22:07 +0100
https://opencores.org/websvn//websvn/revision?repname=openrisc&path=%2Fopenrisc%2Ftrunk%2For1ksim%2F&rev=99
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