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        <link>https://opencores.org/websvn//websvn/listing?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;</link>
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        <item>
            <title>FreeRTOSV6.1.1
 add or32_dma demo task for test dcache manuplation function ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=800</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 800 - filepang&lt;/strong&gt; (12 file(s) modified)&lt;/div&gt;&lt;div&gt;FreeRTOSV6.1.1&lt;br /&gt;
 add or32_dma demo task for test dcache manuplation function ...&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/board.h&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/dma&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/dma/or32_dma.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/dma/or32_dma.h&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/dma.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/dma.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/Makefile&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/FreeRTOSConfig.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/main.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/Makefile&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/Makefile.inc&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/sim.cfg&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Wed, 09 May 2012 02:44:29 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=800</guid>
        </item>
        <item>
            <title>FreeRTOSV6.1.1
 add cache related function from u-boot from OpenRISC
  ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=799</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 799 - filepang&lt;/strong&gt; (8 file(s) modified)&lt;/div&gt;&lt;div&gt;FreeRTOSV6.1.1&lt;br /&gt;
 add cache related function from u-boot from OpenRISC&lt;br /&gt;
  ...&lt;/div&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/cache.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/interrupts.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/Makefile&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/reset.S&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/spr_defs.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/support.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/main.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/port_spr_defs.h&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Tue, 08 May 2012 02:05:09 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=799</guid>
        </item>
        <item>
            <title>FreeRTOSV6.1.1
 Source cleanup
 Add redzone beyond the stack pointer</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=675</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 675 - filepang&lt;/strong&gt; (4 file(s) modified)&lt;/div&gt;&lt;div&gt;FreeRTOSV6.1.1&lt;br /&gt;
 Source cleanup&lt;br /&gt;
 Add redzone beyond the stack pointer&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/reset.S&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/port.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/portasm.S&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/portmacro.h&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Sat, 21 Jan 2012 22:47:14 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=675</guid>
        </item>
        <item>
            <title>FreeRTOSV6.1.1
 source cleanup, delete uncecessary code</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=669</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 669 - filepang&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;FreeRTOSV6.1.1&lt;br /&gt;
 source cleanup, delete uncecessary code&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/port.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/portasm.S&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Fri, 09 Dec 2011 14:01:25 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=669</guid>
        </item>
        <item>
            <title>FreeRTOSV6.1.1
 add missing 'make clean' in make script</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=668</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 668 - filepang&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;FreeRTOSV6.1.1&lt;br /&gt;
 add missing 'make clean' in make script&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/Makefile&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Thu, 08 Dec 2011 23:04:13 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=668</guid>
        </item>
        <item>
            <title>FreeRTOSV6.1.1
 minimal set of standard demo task is working</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=666</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 666 - filepang&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;FreeRTOSV6.1.1&lt;br /&gt;
 minimal set of standard demo task is working&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/FreeRTOSConfig.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/main.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/sim.cfg&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Tue, 06 Dec 2011 14:41:40 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=666</guid>
        </item>
        <item>
            <title>FreeRTOSV6.1.1
 fix context save/restore stack size bug
 remove unnecessary line</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=665</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 665 - filepang&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;FreeRTOSV6.1.1&lt;br /&gt;
 fix context save/restore stack size bug&lt;br /&gt;
 remove unnecessary line&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/port.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/portasm.S&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/portmacro.h&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Tue, 06 Dec 2011 14:34:29 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=665</guid>
        </item>
        <item>
            <title>FreeRTOSV6.1.1
 modify processor abstraction layer.
 now,all tasks are running in ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=664</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 664 - filepang&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;FreeRTOSV6.1.1&lt;br /&gt;
 modify processor abstraction layer.&lt;br /&gt;
 now,all tasks are running in ...&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/port.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/portasm.S&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/portmacro.h&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Tue, 06 Dec 2011 14:27:01 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=664</guid>
        </item>
        <item>
            <title>porting some of standard demo tasks

fix serial port(UART) interrupt handler</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=649</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 649 - filepang&lt;/strong&gt; (5 file(s) modified)&lt;/div&gt;&lt;div&gt;porting some of standard demo tasks&lt;br /&gt;
&lt;br /&gt;
fix serial port(UART) interrupt handler&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/FreeRTOSConfig.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/main.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/Makefile&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/serial/serial.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/sim.cfg&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Thu, 22 Sep 2011 15:12:12 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=649</guid>
        </item>
        <item>
            <title>porint parallel port(gpio) management task</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=637</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 637 - filepang&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;porint parallel port(gpio) management task&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/ParTest/ParTest.c&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Fri, 26 Aug 2011 14:38:07 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=637</guid>
        </item>
        <item>
            <title>porting serial port management task, interrupt hander</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=636</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 636 - filepang&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;porting serial port management task, interrupt hander&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/serial/serial.c&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Fri, 26 Aug 2011 14:36:02 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=636</guid>
        </item>
        <item>
            <title>add missing delay slot instruction
	vPortDisableInterrupts
	vPortEnableInterrupts</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=624</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 624 - filepang&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;add missing delay slot instruction&lt;br /&gt;
	vPortDisableInterrupts&lt;br /&gt;
	vPortEnableInterrupts&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/portasm.S&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Sun, 14 Aug 2011 07:22:59 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=624</guid>
        </item>
        <item>
            <title>cleanup source code 
	Demo/OpenRISC_SIM_GCC/arch/support. ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=623</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 623 - filepang&lt;/strong&gt; (7 file(s) modified)&lt;/div&gt;&lt;div&gt;cleanup source code &lt;br /&gt;
	Demo/OpenRISC_SIM_GCC/arch/support.h&lt;br /&gt;
	Demo/OpenRISC_SIM_GCC/arch/interrupts.h&lt;br /&gt;
	Demo/OpenRISC_SIM_GCC/arch/link.ld&lt;br /&gt;
&lt;br /&gt;
add gpio driver&lt;br /&gt;
&lt;br /&gt;
add gpio base address definition&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/board.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/interrupts.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/link.ld&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/support.h&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/gpio.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/gpio.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/Makefile&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Sat, 13 Aug 2011 15:46:08 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=623</guid>
        </item>
        <item>
            <title>update uart driver for support multiple uart cores 
  ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=622</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 622 - filepang&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;update uart driver for support multiple uart cores &lt;br /&gt;
  ...&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/uart.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/uart.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/main.c&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Sat, 13 Aug 2011 13:39:18 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=622</guid>
        </item>
        <item>
            <title>update sim.cfg for newer version of Or1ksim.
remove unused files.
cleanup source ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=621</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 621 - filepang&lt;/strong&gt; (17 file(s) modified)&lt;/div&gt;&lt;div&gt;update sim.cfg for newer version of Or1ksim.&lt;br /&gt;
remove unused files.&lt;br /&gt;
cleanup source ...&lt;/div&gt;- /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/int.c&lt;br /&gt;- /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/int.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/interrupts.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/interrupts.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/Makefile&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/reset.S&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/support.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/Makefile&lt;br /&gt;- /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/tick.c&lt;br /&gt;- /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/tick.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/uart.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/uart.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/main.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/sim.cfg&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/port.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/portasm.S&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Source/portable/GCC/OpenRISC/portmacro.h&lt;br /&gt;</description>
            <author>filepang</author>
            <pubDate>Thu, 11 Aug 2011 21:45:13 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=621</guid>
        </item>
        <item>
            <title>remove unused file
cleanup makefile
update uart_init(), disable interrupt before initialize.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=620</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 620 - jeremybennett&lt;/strong&gt; (6 file(s) modified)&lt;/div&gt;&lt;div&gt;remove unused file&lt;br /&gt;
cleanup makefile&lt;br /&gt;
update uart_init(), disable interrupt before initialize.&lt;/div&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/Makefile&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/Makefile&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/tick.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/tick.h&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/uart.c&lt;br /&gt;~ /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/Makefile&lt;br /&gt;</description>
            <author>jeremybennett</author>
            <pubDate>Thu, 11 Aug 2011 08:45:11 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=620</guid>
        </item>
        <item>
            <title>Initial port of FreeRTOS by filepang (Kim Sung Su).</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=616</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 616 - jeremybennett&lt;/strong&gt; (16 file(s) modified)&lt;/div&gt;&lt;div&gt;Initial port of FreeRTOS by filepang (Kim Sung Su).&lt;/div&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/FileIO&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/FileIO/fileIO.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/FRConfig.h&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/FreeRTOSConfig.h&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/main.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/ParTest&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/ParTest/ParTest.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/rtosdemo.DSW&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/RTOSDEMO.IDE&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/rtosdemo.lk1&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/rtosdemo.mk&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/rtosdemo.mk1&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/rtosdemo.tgt&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/rtosdemo.wpj&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/serial&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite/serial/serial.c&lt;br /&gt;</description>
            <author>jeremybennett</author>
            <pubDate>Thu, 28 Jul 2011 12:42:38 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=616</guid>
        </item>
        <item>
            <title>Initial port of FreeRTOS by filepang (Kim Sung Su).</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=615</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 615 - jeremybennett&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Initial port of FreeRTOS by filepang (Kim Sung Su).&lt;/div&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/Flshlite&lt;br /&gt;</description>
            <author>jeremybennett</author>
            <pubDate>Thu, 28 Jul 2011 12:42:18 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=615</guid>
        </item>
        <item>
            <title>Initial port of FreeRTOS by filepang (Kim Sung Su).</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=614</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 614 - jeremybennett&lt;/strong&gt; (19 file(s) modified)&lt;/div&gt;&lt;div&gt;Initial port of FreeRTOS by filepang (Kim Sung Su).&lt;/div&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/FreeRTOSConfig.h&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/IntQueueTimer.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/IntQueueTimer.h&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/IntQueueTimer_isr.S&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/lcd.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/lcd.h&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/main.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/ParTest&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/ParTest/ParTest.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/printf-stdarg.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/RegisterTestTasks.s&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/RTOSDemo.mcp&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/RTOSDemo.mcs&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/serial&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/serial/serial.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/serial/serial_isr.S&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/timertest.c&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/timertest.h&lt;br /&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB/timertest_isr.S&lt;br /&gt;</description>
            <author>jeremybennett</author>
            <pubDate>Thu, 28 Jul 2011 12:41:51 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=614</guid>
        </item>
        <item>
            <title>Initial port of FreeRTOS by filepang (Kim Sung Su).</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=613</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 613 - jeremybennett&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Initial port of FreeRTOS by filepang (Kim Sung Su).&lt;/div&gt;+ /openrisc/trunk/rtos/freertos-6.1.1/Demo/PIC32MX_MPLAB&lt;br /&gt;</description>
            <author>jeremybennett</author>
            <pubDate>Thu, 28 Jul 2011 12:40:12 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=openrisc&amp;path=%2Fopenrisc%2Ftrunk%2Frtos%2Ffreertos-6.1.1%2F&amp;rev=613</guid>
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