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or1k WebSVN RSS feed - or1k https://opencores.org/websvn//websvn/listing?repname=or1k&path=%2For1k%2Fbranches%2F& Sat, 11 Jul 2020 14:56:18 +0100 FeedCreator 1.7.2 ... https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2For1k%2Fbranches%2F&rev=1765 <div><strong>Rev 1765 - root</strong> (267 file(s) modified)</div><div>...</div>- /branches<br />+ /or1k<br />+ /or1k/branches<br />+ /or1k/tags<br />+ /or1k/trunk<br />- /tags<br />- /trunk<br />+ /web_uploads<br />+ /web_uploads/arch.gif<br />+ /web_uploads/ats<br />+ /web_uploads/ats/build_binutils.status<br />+ /web_uploads/ats/build_binutils.txt<br />+ /web_uploads/ats/build_gdb.status<br />+ /web_uploads/ats/build_gdb.txt<br />+ /web_uploads/ats/build_newlib_gcc.status<br />+ /web_uploads/ats/build_newlib_gcc.txt<br />+ /web_uploads/ats/build_or1ksim.status<br />+ /web_uploads/ats/build_or1ksim.txt<br />+ /web_uploads/ats/build_uclibc.status<br />+ /web_uploads/ats/build_uclibc.txt<br />+ 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/branches/stable_0_2_x/insight/opcodes/z8k-dis.c<br />- /branches/stable_0_2_x/insight/opcodes/z8k-opc.h<br />- /branches/stable_0_2_x/insight/opcodes/z8kgen.c<br />- /branches/stable_0_2_x/insight/readline<br />- /branches/stable_0_2_x/insight/README<br />- /branches/stable_0_2_x/insight/sim<br />- /branches/stable_0_2_x/insight/symlink-tree<br />- /branches/stable_0_2_x/insight/tcl<br />- /branches/stable_0_2_x/insight/texinfo<br />- /branches/stable_0_2_x/insight/tix<br />- /branches/stable_0_2_x/insight/tk<br />- /branches/stable_0_2_x/insight/utils<br />- /branches/stable_0_2_x/insight/ylwrap<br />- /branches/stable_0_2_x/jtag<br />- /branches/stable_0_2_x/linux<br />- /branches/stable_0_2_x/mp3<br />- /branches/stable_0_2_x/mw<br />- /branches/stable_0_2_x/newlib<br />- /branches/stable_0_2_x/newlib-1.10.0<br />/branches/stable_0_2_x/or1ksim/COPYING<br />/branches/stable_0_2_x/or1ksim/cpu/dlx/arch.h<br />- /branches/stable_0_2_x/or1200<br />- /branches/stable_0_2_x/orp<br />- /branches/stable_0_2_x/orpmon<br />- /branches/stable_0_2_x/rc203soc<br />- /branches/stable_0_2_x/rtems<br />- /branches/stable_0_2_x/rtems-20020807<br />- /branches/stable_0_2_x/uclinux<br />- /branches/stable_0_2_x/xess<br /> Wed, 18 Jan 2006 19:39:12 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1646 aclocal &amp;&amp; autoconf &amp;&amp; automake https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1379 <div><strong>Rev 1379 - phoenix</strong> (1 file(s) modified)</div><div>aclocal &amp;&amp; autoconf &amp;&amp; automake</div>~ /branches/stable_0_1_x/or1ksim/vapi/Makefile.in<br /> phoenix Sat, 26 Feb 2005 12:46:53 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1379 aclocal &amp;&amp; autoconf &amp;&amp; automake https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1378 <div><strong>Rev 1378 - phoenix</strong> (20 file(s) modified)</div><div>aclocal &amp;&amp; autoconf &amp;&amp; automake</div>~ /branches/stable_0_1_x/or1ksim/aclocal.m4<br />~ /branches/stable_0_1_x/or1ksim/bpb/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/cache/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/configure<br />~ /branches/stable_0_1_x/or1ksim/cpu/common/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/cpu/dlx/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/cpu/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/cpu/or1k/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/cpu/or32/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/cuc/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/debug/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/mmu/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/peripheral/channels/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/peripheral/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/pic/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/pm/Makefile.in<br />+ /branches/stable_0_1_x/or1ksim/port/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/support/Makefile.in<br />~ /branches/stable_0_1_x/or1ksim/tick/Makefile.in<br /> phoenix Sat, 26 Feb 2005 12:41:19 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1378 This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1356 <div><strong>Rev 1356 - </strong> (503 file(s) modified)</div><div>This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'.</div>+ /branches/stable_0_1_x<br />- /branches/stable_0_1_x/docs<br />- /branches/stable_0_1_x/ecos-2.0<br />- /branches/stable_0_1_x/gdb-5.0/bfd<br />- /branches/stable_0_1_x/gdb-5.0/config<br />- /branches/stable_0_1_x/gdb-5.0/config-ml.in<br />- /branches/stable_0_1_x/gdb-5.0/config.guess<br />- /branches/stable_0_1_x/gdb-5.0/config.if<br />- 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/>- /branches/stable_0_1_x/insight/sim<br />- /branches/stable_0_1_x/insight/symlink-tree<br />- /branches/stable_0_1_x/insight/tcl<br />- /branches/stable_0_1_x/insight/texinfo<br />- /branches/stable_0_1_x/insight/tix<br />- /branches/stable_0_1_x/insight/tk<br />- /branches/stable_0_1_x/insight/utils<br />- /branches/stable_0_1_x/insight/ylwrap<br />- /branches/stable_0_1_x/jtag<br />- /branches/stable_0_1_x/linux<br />- /branches/stable_0_1_x/mp3<br />- /branches/stable_0_1_x/mw<br />- /branches/stable_0_1_x/newlib<br />- /branches/stable_0_1_x/newlib-1.10.0<br />/branches/stable_0_1_x/or1ksim/COPYING<br />/branches/stable_0_1_x/or1ksim/cpu/dlx/arch.h<br />- /branches/stable_0_1_x/or1200<br />- /branches/stable_0_1_x/orp<br />- /branches/stable_0_1_x/orpmon<br />- /branches/stable_0_1_x/rc203soc<br />- /branches/stable_0_1_x/rtems<br />- /branches/stable_0_1_x/rtems-20020807<br />- /branches/stable_0_1_x/uclinux<br />- /branches/stable_0_1_x/xess<br /> Fri, 11 Feb 2005 10:23:08 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1356 preliminary HW breakpoints support in debug unit (by default disabled). ... https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1252 <div><strong>Rev 1252 - lampret</strong> (6 file(s) modified)</div><div>preliminary HW breakpoints support in debug unit (by default disabled). ...</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_cpu.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_ctrl.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_defines.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_du.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_except.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_top.v<br /> lampret Wed, 11 Feb 2004 01:40:11 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1252 Error fixed. https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1235 <div><strong>Rev 1235 - simons</strong> (1 file(s) modified)</div><div>Error fixed.</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_du.v<br /> simons Sun, 18 Jan 2004 10:08:00 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1235 Errors fixed. https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1233 <div><strong>Rev 1233 - simons</strong> (2 file(s) modified)</div><div>Errors fixed.</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_du.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_top.v<br /> simons Sat, 17 Jan 2004 21:14:14 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1233 Error fixed. https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1231 <div><strong>Rev 1231 - simons</strong> (1 file(s) modified)</div><div>Error fixed.</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_top.v<br /> simons Sat, 17 Jan 2004 19:06:38 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1231 Error fixed. https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1229 <div><strong>Rev 1229 - simons</strong> (1 file(s) modified)</div><div>Error fixed.</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_top.v<br /> simons Sat, 17 Jan 2004 18:39:48 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1229 interface to debug changed; no more opselect; stb-ack protocol https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1226 <div><strong>Rev 1226 - markom</strong> (3 file(s) modified)</div><div>interface to debug changed; no more opselect; stb-ack protocol</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_defines.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_du.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_top.v<br /> markom Thu, 15 Jan 2004 06:46:38 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1226 Separate instruction and data QMEM decoders, QMEM acknowledge and byte-select ... https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1225 <div><strong>Rev 1225 - andreje</strong> (2 file(s) modified)</div><div>Separate instruction and data QMEM decoders, QMEM acknowledge and byte-select ...</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_defines.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_qmem_top.v<br /> andreje Sun, 11 Jan 2004 22:45:46 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1225 Exception prefix configuration changed. https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1220 <div><strong>Rev 1220 - simons</strong> (3 file(s) modified)</div><div>Exception prefix configuration changed.</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_defines.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_genpc.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_sprs.v<br /> simons Wed, 17 Dec 2003 13:43:38 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1220 Qmem mbist signals fixed. https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1219 <div><strong>Rev 1219 - simons</strong> (1 file(s) modified)</div><div>Qmem mbist signals fixed.</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_qmem_top.v<br /> simons Wed, 17 Dec 2003 13:36:58 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1219 Support for ram with byte selects added. https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1216 <div><strong>Rev 1216 - simons</strong> (1 file(s) modified)</div><div>Support for ram with byte selects added.</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_dc_ram.v<br /> simons Wed, 10 Dec 2003 15:28:28 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1216 Mbist nameing changed, Artisan ram instance signal names fixed, some ... https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1214 <div><strong>Rev 1214 - simons</strong> (22 file(s) modified)</div><div>Mbist nameing changed, Artisan ram instance signal names fixed, some ...</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_cpu.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_dc_ram.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_dc_tag.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_dc_top.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_dmmu_tlb.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_dmmu_top.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_ic_ram.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_ic_tag.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_ic_top.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_immu_tlb.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_immu_top.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_qmem_top.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_spram_64x14.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_spram_64x22.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_spram_64x24.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_spram_256x21.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_spram_512x20.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_spram_1024x8.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_spram_1024x32.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_spram_2048x8.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_spram_2048x32.v<br />~ /branches/branch_qmem/or1200/rtl/verilog/or1200_top.v<br /> simons Tue, 09 Dec 2003 11:46:49 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1214 This commit was manufactured by cvs2svn to create branch 'branch_qmem'. https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1213 <div><strong>Rev 1213 - </strong> (3 file(s) modified)</div><div>This commit was manufactured by cvs2svn to create branch 'branch_qmem'.</div>+ /branches/branch_qmem/or1200/rtl/verilog/or1200_iwb_biu.v<br />+ /branches/branch_qmem/or1200/rtl/verilog/or1200_spram_1024x32_bw.v<br />+ /branches/branch_qmem/or1200/rtl/verilog/or1200_spram_2048x32_bw.v<br /> Fri, 05 Dec 2003 00:12:10 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1213 No functional change. https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1210 <div><strong>Rev 1210 - lampret</strong> (1 file(s) modified)</div><div>No functional change.</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_freeze.v<br /> lampret Fri, 05 Dec 2003 00:09:49 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1210 Fixed instantiation name. https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1209 <div><strong>Rev 1209 - lampret</strong> (1 file(s) modified)</div><div>Fixed instantiation name.</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_top.v<br /> lampret Fri, 05 Dec 2003 00:08:44 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1209 Static exception prefix. https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1207 <div><strong>Rev 1207 - lampret</strong> (2 file(s) modified)</div><div>Static exception prefix.</div>~ /branches/branch_qmem/or1200/rtl/verilog/or1200_defines.v<br />~ /trunk/or1200/rtl/verilog/or1200_sprs.v<br /> lampret Fri, 05 Dec 2003 00:05:25 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Fbranches%2F&rev=1207
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