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/tags/nog_patch_63/insight/opcodes/arc-opc.c<br />- /tags/nog_patch_63/insight/opcodes/arm-dis.c<br />- /tags/nog_patch_63/insight/opcodes/arm-opc.h<br />- /tags/nog_patch_63/insight/opcodes/avr-dis.c<br />- /tags/nog_patch_63/insight/opcodes/cgen-asm.c<br />- /tags/nog_patch_63/insight/opcodes/cgen-asm.in<br />- /tags/nog_patch_63/insight/opcodes/cgen-dis.c<br />- /tags/nog_patch_63/insight/opcodes/cgen-dis.in<br />- /tags/nog_patch_63/insight/opcodes/cgen-ibld.in<br />- /tags/nog_patch_63/insight/opcodes/cgen-opc.c<br />- /tags/nog_patch_63/insight/opcodes/cgen.sh<br />- /tags/nog_patch_63/insight/opcodes/ChangeLog<br />- /tags/nog_patch_63/insight/opcodes/ChangeLog-9297<br />- /tags/nog_patch_63/insight/opcodes/ChangeLog-9899<br />- /tags/nog_patch_63/insight/opcodes/config.in<br />- /tags/nog_patch_63/insight/opcodes/configure<br />- /tags/nog_patch_63/insight/opcodes/configure.in<br />- /tags/nog_patch_63/insight/opcodes/cris-dis.c<br />- /tags/nog_patch_63/insight/opcodes/cris-opc.c<br />- /tags/nog_patch_63/insight/opcodes/d10v-dis.c<br />- /tags/nog_patch_63/insight/opcodes/d10v-opc.c<br />- /tags/nog_patch_63/insight/opcodes/d30v-dis.c<br />- /tags/nog_patch_63/insight/opcodes/d30v-opc.c<br />- /tags/nog_patch_63/insight/opcodes/dep-in.sed<br />- /tags/nog_patch_63/insight/opcodes/dis-buf.c<br />- /tags/nog_patch_63/insight/opcodes/disassemble.c<br />- /tags/nog_patch_63/insight/opcodes/fr30-asm.c<br />- /tags/nog_patch_63/insight/opcodes/fr30-desc.c<br />- /tags/nog_patch_63/insight/opcodes/fr30-desc.h<br />- /tags/nog_patch_63/insight/opcodes/fr30-dis.c<br />- /tags/nog_patch_63/insight/opcodes/fr30-ibld.c<br />- /tags/nog_patch_63/insight/opcodes/fr30-opc.c<br />- /tags/nog_patch_63/insight/opcodes/fr30-opc.h<br />- /tags/nog_patch_63/insight/opcodes/h8300-dis.c<br />- /tags/nog_patch_63/insight/opcodes/h8500-dis.c<br />- /tags/nog_patch_63/insight/opcodes/h8500-opc.h<br />- /tags/nog_patch_63/insight/opcodes/hppa-dis.c<br />- /tags/nog_patch_63/insight/opcodes/i370-dis.c<br />- /tags/nog_patch_63/insight/opcodes/i370-opc.c<br />- /tags/nog_patch_63/insight/opcodes/i386-dis.c<br />- /tags/nog_patch_63/insight/opcodes/i860-dis.c<br />- /tags/nog_patch_63/insight/opcodes/i960-dis.c<br />- /tags/nog_patch_63/insight/opcodes/ia64-asmtab.c<br />- /tags/nog_patch_63/insight/opcodes/ia64-asmtab.h<br />- /tags/nog_patch_63/insight/opcodes/ia64-dis.c<br />- /tags/nog_patch_63/insight/opcodes/ia64-gen.c<br />- /tags/nog_patch_63/insight/opcodes/ia64-ic.tbl<br />- /tags/nog_patch_63/insight/opcodes/ia64-opc-a.c<br />- /tags/nog_patch_63/insight/opcodes/ia64-opc-b.c<br />- /tags/nog_patch_63/insight/opcodes/ia64-opc-d.c<br />- /tags/nog_patch_63/insight/opcodes/ia64-opc-f.c<br />- /tags/nog_patch_63/insight/opcodes/ia64-opc-i.c<br />- /tags/nog_patch_63/insight/opcodes/ia64-opc-m.c<br />- /tags/nog_patch_63/insight/opcodes/ia64-opc-x.c<br />- /tags/nog_patch_63/insight/opcodes/ia64-opc.c<br />- /tags/nog_patch_63/insight/opcodes/ia64-opc.h<br />- /tags/nog_patch_63/insight/opcodes/ia64-raw.tbl<br />- /tags/nog_patch_63/insight/opcodes/ia64-war.tbl<br />- /tags/nog_patch_63/insight/opcodes/ia64-waw.tbl<br />- /tags/nog_patch_63/insight/opcodes/m32r-asm.c<br />- /tags/nog_patch_63/insight/opcodes/m32r-desc.c<br />- /tags/nog_patch_63/insight/opcodes/m32r-desc.h<br />- /tags/nog_patch_63/insight/opcodes/m32r-dis.c<br />- /tags/nog_patch_63/insight/opcodes/m32r-ibld.c<br />- /tags/nog_patch_63/insight/opcodes/m32r-opc.c<br />- /tags/nog_patch_63/insight/opcodes/m32r-opc.h<br />- /tags/nog_patch_63/insight/opcodes/m32r-opinst.c<br />- /tags/nog_patch_63/insight/opcodes/m68hc11-dis.c<br />- /tags/nog_patch_63/insight/opcodes/m68hc11-opc.c<br />- /tags/nog_patch_63/insight/opcodes/m68k-dis.c<br />- /tags/nog_patch_63/insight/opcodes/m68k-opc.c<br />- /tags/nog_patch_63/insight/opcodes/m88k-dis.c<br />- /tags/nog_patch_63/insight/opcodes/m10200-dis.c<br />- /tags/nog_patch_63/insight/opcodes/m10200-opc.c<br />- /tags/nog_patch_63/insight/opcodes/m10300-dis.c<br />- /tags/nog_patch_63/insight/opcodes/m10300-opc.c<br />- /tags/nog_patch_63/insight/opcodes/MAINTAINERS<br />- /tags/nog_patch_63/insight/opcodes/Makefile.am<br />- /tags/nog_patch_63/insight/opcodes/Makefile.in<br />- /tags/nog_patch_63/insight/opcodes/makefile.vms<br />- /tags/nog_patch_63/insight/opcodes/mcore-dis.c<br />- /tags/nog_patch_63/insight/opcodes/mcore-opc.h<br />- /tags/nog_patch_63/insight/opcodes/mips-dis.c<br />- /tags/nog_patch_63/insight/opcodes/mips-opc.c<br />- /tags/nog_patch_63/insight/opcodes/mips16-opc.c<br />- /tags/nog_patch_63/insight/opcodes/mpw-config.in<br />- /tags/nog_patch_63/insight/opcodes/mpw-make.sed<br />- /tags/nog_patch_63/insight/opcodes/ns32k-dis.c<br />- /tags/nog_patch_63/insight/opcodes/openrisc-asm.c<br />- /tags/nog_patch_63/insight/opcodes/openrisc-desc.c<br />- /tags/nog_patch_63/insight/opcodes/openrisc-desc.h<br />- /tags/nog_patch_63/insight/opcodes/openrisc-dis.c<br />- /tags/nog_patch_63/insight/opcodes/openrisc-ibld.c<br />- /tags/nog_patch_63/insight/opcodes/openrisc-opc.c<br />- /tags/nog_patch_63/insight/opcodes/openrisc-opc.h<br />- /tags/nog_patch_63/insight/opcodes/opintl.h<br />- /tags/nog_patch_63/insight/opcodes/or1k-dis.c<br />- /tags/nog_patch_63/insight/opcodes/or32-dis.c<br />- /tags/nog_patch_63/insight/opcodes/pdp11-dis.c<br />- /tags/nog_patch_63/insight/opcodes/pdp11-opc.c<br />- /tags/nog_patch_63/insight/opcodes/pj-dis.c<br />- /tags/nog_patch_63/insight/opcodes/pj-opc.c<br />- /tags/nog_patch_63/insight/opcodes/po<br />- /tags/nog_patch_63/insight/opcodes/ppc-dis.c<br />- /tags/nog_patch_63/insight/opcodes/ppc-opc.c<br />- /tags/nog_patch_63/insight/opcodes/s390-dis.c<br />- /tags/nog_patch_63/insight/opcodes/s390-mkopc.c<br />- /tags/nog_patch_63/insight/opcodes/s390-opc.c<br />- /tags/nog_patch_63/insight/opcodes/s390-opc.txt<br />- /tags/nog_patch_63/insight/opcodes/sh-dis.c<br />- /tags/nog_patch_63/insight/opcodes/sh-opc.h<br />- /tags/nog_patch_63/insight/opcodes/sparc-dis.c<br />- /tags/nog_patch_63/insight/opcodes/sparc-opc.c<br />- /tags/nog_patch_63/insight/opcodes/stamp-h.in<br />- /tags/nog_patch_63/insight/opcodes/sysdep.h<br />- /tags/nog_patch_63/insight/opcodes/tic30-dis.c<br />- /tags/nog_patch_63/insight/opcodes/tic54x-dis.c<br />- /tags/nog_patch_63/insight/opcodes/tic54x-opc.c<br />- /tags/nog_patch_63/insight/opcodes/tic80-dis.c<br />- /tags/nog_patch_63/insight/opcodes/tic80-opc.c<br />- /tags/nog_patch_63/insight/opcodes/v850-dis.c<br />- /tags/nog_patch_63/insight/opcodes/v850-opc.c<br />- /tags/nog_patch_63/insight/opcodes/vax-dis.c<br />- /tags/nog_patch_63/insight/opcodes/w65-dis.c<br />- /tags/nog_patch_63/insight/opcodes/w65-opc.h<br />- /tags/nog_patch_63/insight/opcodes/z8k-dis.c<br />- /tags/nog_patch_63/insight/opcodes/z8k-opc.h<br />- /tags/nog_patch_63/insight/opcodes/z8kgen.c<br />- /tags/nog_patch_63/insight/readline<br />- /tags/nog_patch_63/insight/README<br />- /tags/nog_patch_63/insight/sim<br />- /tags/nog_patch_63/insight/symlink-tree<br />- /tags/nog_patch_63/insight/tcl<br />- /tags/nog_patch_63/insight/texinfo<br />- /tags/nog_patch_63/insight/tix<br />- /tags/nog_patch_63/insight/tk<br />- /tags/nog_patch_63/insight/utils<br />- /tags/nog_patch_63/insight/ylwrap<br />- /tags/nog_patch_63/jtag<br />- /tags/nog_patch_63/linux<br />- /tags/nog_patch_63/mp3<br />- /tags/nog_patch_63/mw<br />- /tags/nog_patch_63/newlib<br />- /tags/nog_patch_63/newlib-1.10.0<br />/tags/nog_patch_63/or1ksim/COPYING<br />/tags/nog_patch_63/or1ksim/cpu/dlx/arch.h<br />- /tags/nog_patch_63/or1200<br />- /tags/nog_patch_63/orp<br />- /tags/nog_patch_63/orpmon<br />- /tags/nog_patch_63/rc203soc<br />- /tags/nog_patch_63/rtems<br />- /tags/nog_patch_63/rtems-20020807<br />- /tags/nog_patch_63/uclinux<br />- /tags/nog_patch_63/xess<br /> Thu, 31 Mar 2005 16:06:27 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftags%2Fnog_patch_63%2F&rev=1451 Change --enable-simple to --enable-execution to be able to select between ... https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1450 <div><strong>Rev 1450 - nogj</strong> (1 file(s) modified)</div><div>Change --enable-simple to --enable-execution to be able to select between ...</div>~ /trunk/or1ksim/configure.in<br /> nogj Thu, 31 Mar 2005 16:06:26 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1450 Issue an error if the selected target cpu is unknown https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1448 <div><strong>Rev 1448 - nogj</strong> (1 file(s) modified)</div><div>Issue an error if the selected target cpu is unknown</div>~ /trunk/or1ksim/configure.in<br /> nogj Thu, 31 Mar 2005 16:05:38 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1448 Cosmetic fixes https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1446 <div><strong>Rev 1446 - nogj</strong> (14 file(s) modified)</div><div>Cosmetic fixes</div>~ /trunk/or1ksim/cpu/common/abstract.c<br />~ /trunk/or1ksim/cpu/common/abstract.h<br />~ /trunk/or1ksim/cpu/or1k/sprs.c<br />~ /trunk/or1ksim/cpu/or32/execute.c<br />~ /trunk/or1ksim/mmu/immu.c<br />~ /trunk/or1ksim/peripheral/fb.c<br />~ /trunk/or1ksim/peripheral/ps2kbd.c<br />~ /trunk/or1ksim/pic/pic.c<br />~ /trunk/or1ksim/sim-cmd.c<br />~ /trunk/or1ksim/sim-config.h<br />~ /trunk/or1ksim/support/simprintf.c<br />~ /trunk/or1ksim/testbench/mmu.c<br />~ /trunk/or1ksim/tick/tick.c<br />~ /trunk/or1ksim/toplevel.c<br /> nogj Thu, 31 Mar 2005 16:04:48 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1446 Move the definitions needed for the simple execution model out ... https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1444 <div><strong>Rev 1444 - nogj</strong> (5 file(s) modified)</div><div>Move the definitions needed for the simple execution model out ...</div>~ /trunk/gdb-5.0/include/opcode/or32.h<br />~ /trunk/gdb-5.0/opcodes/or32.h<br />~ /trunk/insight/include/opcode/or32.h<br />~ /trunk/or1ksim/cpu/or1k/opcode/or32.h<br />+ /trunk/or1ksim/cpu/or32/simpl32_defs.h<br /> nogj Thu, 31 Mar 2005 16:03:28 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1444 Replace some problematic calles to mfspr/mtspr with direct access to ... https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1442 <div><strong>Rev 1442 - nogj</strong> (3 file(s) modified)</div><div>Replace some problematic calles to mfspr/mtspr with direct access to ...</div>~ /trunk/or1ksim/cpu/or1k/except.c<br />~ /trunk/or1ksim/cpu/or1k/sprs.h<br />~ /trunk/or1ksim/cpu/or32/execute.c<br /> nogj Thu, 31 Mar 2005 16:02:35 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1442 Reclasify l.trap and l.sys to be an exception instruction https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1440 <div><strong>Rev 1440 - nogj</strong> (4 file(s) modified)</div><div>Reclasify l.trap and l.sys to be an exception instruction</div>~ /trunk/gen_or1k_isa/sources/opcode/or32.c<br />~ /trunk/gen_or1k_isa/sources/or32.c<br />~ /trunk/insight/opcodes/or32.c<br />~ /trunk/or1ksim/cpu/or32/or32.c<br /> nogj Thu, 31 Mar 2005 16:01:59 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1440 NOP_REPORT should report numbers in hex not decimal https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1438 <div><strong>Rev 1438 - nogj</strong> (1 file(s) modified)</div><div>NOP_REPORT should report numbers in hex not decimal</div>~ /trunk/or1ksim/cpu/or32/insnset.c<br /> nogj Thu, 31 Mar 2005 16:01:28 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1438 Rearange some code to make it clearer what it does https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1436 <div><strong>Rev 1436 - nogj</strong> (1 file(s) modified)</div><div>Rearange some code to make it clearer what it does</div>~ /trunk/or1ksim/cpu/common/trace.c<br /> nogj Thu, 31 Mar 2005 16:00:53 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1436 Fix the prototype of setsim_reg https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1434 <div><strong>Rev 1434 - nogj</strong> (1 file(s) modified)</div><div>Fix the prototype of setsim_reg</div>~ /trunk/or1ksim/cpu/common/execute.h<br /> nogj Thu, 31 Mar 2005 16:00:08 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1434 Collect most of the cpu state variables in a structure ... https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1432 <div><strong>Rev 1432 - nogj</strong> (21 file(s) modified)</div><div>Collect most of the cpu state variables in a structure ...</div>~ /trunk/or1ksim/cache/dcache_model.c<br />~ /trunk/or1ksim/cache/icache_model.c<br />~ /trunk/or1ksim/cpu/common/abstract.c<br />~ /trunk/or1ksim/cpu/common/execute.h<br />~ /trunk/or1ksim/cpu/common/stats.c<br />~ /trunk/or1ksim/cpu/or1k/except.c<br />~ /trunk/or1ksim/cpu/or1k/sprs.c<br />~ /trunk/or1ksim/cpu/or1k/sprs.h<br />~ /trunk/or1ksim/cpu/or32/execute.c<br />~ /trunk/or1ksim/cpu/or32/generate.c<br />~ /trunk/or1ksim/cpu/or32/insnset.c<br />~ /trunk/or1ksim/debug/debug_unit.c<br />~ /trunk/or1ksim/mmu/dmmu.c<br />~ /trunk/or1ksim/mmu/immu.c<br />~ /trunk/or1ksim/pic/pic.c<br />~ /trunk/or1ksim/pm/pm.c<br />~ /trunk/or1ksim/sim-cmd.c<br />~ /trunk/or1ksim/sim-config.c<br />~ /trunk/or1ksim/support/dumpverilog.c<br />~ /trunk/or1ksim/tick/tick.c<br />~ /trunk/or1ksim/toplevel.c<br /> nogj Thu, 31 Mar 2005 15:59:37 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1432 Log SPR_SR in the execution log https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1430 <div><strong>Rev 1430 - nogj</strong> (1 file(s) modified)</div><div>Log SPR_SR in the execution log</div>~ /trunk/or1ksim/cpu/or32/execute.c<br /> nogj Thu, 31 Mar 2005 15:57:09 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1430 Remove useless indirection: check_depend()-&gt;depend_operands() https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1428 <div><strong>Rev 1428 - nogj</strong> (3 file(s) modified)</div><div>Remove useless indirection: check_depend()-&gt;depend_operands()</div>~ /trunk/or1ksim/cpu/common/stats.c<br />~ /trunk/or1ksim/cpu/common/stats.h<br />~ /trunk/or1ksim/cpu/or32/execute.c<br /> nogj Thu, 31 Mar 2005 15:55:42 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1428 * Fix some warnings. * Add some debugging messages. https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1426 <div><strong>Rev 1426 - nogj</strong> (2 file(s) modified)</div><div>* Fix some warnings.<br /> * Add some debugging messages.</div>~ /trunk/or1ksim/pic/pic.c<br />~ /trunk/or1ksim/support/dbchs.h<br /> nogj Thu, 31 Mar 2005 15:55:13 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1426 Update the config files for the tests to the new ... https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1424 <div><strong>Rev 1424 - nogj</strong> (3 file(s) modified)</div><div>Update the config files for the tests to the new ...</div>~ /trunk/or1ksim/testbench/acv_gpio.cfg<br />~ /trunk/or1ksim/testbench/acv_uart.cfg<br />~ /trunk/or1ksim/testbench/default.cfg<br /> nogj Thu, 31 Mar 2005 15:54:26 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1424 Remove the useless include &quot;sys/time.h&quot; https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1422 <div><strong>Rev 1422 - nogj</strong> (1 file(s) modified)</div><div>Remove the useless include &quot;sys/time.h&quot;</div>~ /trunk/or1ksim/testbench/support/support.c<br /> nogj Thu, 31 Mar 2005 15:52:39 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1422 Fix test to expect the correct `return code' https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1420 <div><strong>Rev 1420 - nogj</strong> (1 file(s) modified)</div><div>Fix test to expect the correct `return code'</div>~ /trunk/or1ksim/testbench/test<br /> nogj Thu, 31 Mar 2005 15:52:14 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1420 Rearange some code such that it is not assumed that ... https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1418 <div><strong>Rev 1418 - nogj</strong> (1 file(s) modified)</div><div>Rearange some code such that it is not assumed that ...</div>~ /trunk/or1ksim/mmu/immu.c<br /> nogj Thu, 31 Mar 2005 15:51:42 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1418 Make the immu use the new debug functions https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1416 <div><strong>Rev 1416 - nogj</strong> (2 file(s) modified)</div><div>Make the immu use the new debug functions</div>~ /trunk/or1ksim/mmu/immu.c<br />~ /trunk/or1ksim/support/dbchs.h<br /> nogj Thu, 31 Mar 2005 15:51:15 +0100 https://opencores.org/websvn//websvn/revision?repname=or1k&path=%2Ftrunk%2F&rev=1416
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