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https://opencores.org/websvn//websvn/listing?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&
Fri, 29 Mar 2024 11:59:02 +0100FeedCreator 1.7.2Fixed the problem with the clock running too slow.
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=37
<div><strong>Rev 37 - dgisselq</strong> (4 file(s) modified)</div><div>Fixed the problem with the clock running too slow.</div>~ /s6soc/trunk/doc/src/spec.tex<br />~ /s6soc/trunk/rtl/builddate.v<br />~ /s6soc/trunk/sw/zipos/kernel.c<br />~ /s6soc/trunk/sw/zipos/ksetup.c<br />dgisselqTue, 17 May 2016 02:28:29 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=37Many updates to the SPEC, although it's still by no ...
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=36
<div><strong>Rev 36 - dgisselq</strong> (2 file(s) modified)</div><div>Many updates to the SPEC, although it's still by no ...</div>~ /s6soc/trunk/doc/spec.pdf<br />~ /s6soc/trunk/doc/src/spec.tex<br />dgisselqSun, 15 May 2016 02:05:07 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=36Minor updates and tweaks, primarily fixing the none_sel signal when ...
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=35
<div><strong>Rev 35 - dgisselq</strong> (2 file(s) modified)</div><div>Minor updates and tweaks, primarily fixing the none_sel signal when ...</div>~ /s6soc/trunk/rtl/builddate.v<br />~ /s6soc/trunk/rtl/busmaster.v<br />dgisselqSun, 15 May 2016 02:01:08 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=35Adjusted this so that the "*.c" files are now archived. ...
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=34
<div><strong>Rev 34 - dgisselq</strong> (1 file(s) modified)</div><div>Adjusted this so that the "*.c" files are now archived. ...</div>~ /s6soc/trunk/Makefile<br />dgisselqSun, 15 May 2016 02:00:16 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=34Adjusted the defaults, so that more values have defined default ...
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=33
<div><strong>Rev 33 - dgisselq</strong> (1 file(s) modified)</div><div>Adjusted the defaults, so that more values have defined default ...</div>~ /s6soc/trunk/rtl/txuart.v<br />dgisselqSun, 15 May 2016 01:41:34 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=33Removed an undefined value from o_lcd[2] setting.
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=32
<div><strong>Rev 32 - dgisselq</strong> (1 file(s) modified)</div><div>Removed an undefined value from o_lcd[2] setting.</div>~ /s6soc/trunk/rtl/altbusmaster.v<br />dgisselqSun, 15 May 2016 01:40:10 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=32Fixed a bug caught by Verilator.
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=31
<div><strong>Rev 31 - dgisselq</strong> (1 file(s) modified)</div><div>Fixed a bug caught by Verilator.</div>~ /s6soc/trunk/rtl/toplevel.v<br />dgisselqSun, 15 May 2016 01:37:24 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=31Brings the CPU up to date with the rest of ...
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=30
<div><strong>Rev 30 - dgisselq</strong> (2 file(s) modified)</div><div>Brings the CPU up to date with the rest of ...</div>~ /s6soc/trunk/rtl/cpu/idecode.v<br />~ /s6soc/trunk/rtl/cpu/zipcpu.v<br />dgisselqSun, 15 May 2016 01:35:56 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=30A first capability for setting time, dawn, and dusk values ...
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=29
<div><strong>Rev 29 - dgisselq</strong> (11 file(s) modified)</div><div>A first capability for setting time, dawn, and dusk values ...</div>+ /s6soc/trunk/sw/dev/keypad.c<br />+ /s6soc/trunk/sw/dev/keypad.h<br />+ /s6soc/trunk/sw/dev/kptest.c<br />~ /s6soc/trunk/sw/dev/Makefile<br />~ /s6soc/trunk/sw/zipos/cmodram.ld<br />~ /s6soc/trunk/sw/zipos/doorbell.c<br />~ /s6soc/trunk/sw/zipos/kernel.c<br />~ /s6soc/trunk/sw/zipos/kfildes.h<br />~ /s6soc/trunk/sw/zipos/ksetup.c<br />~ /s6soc/trunk/sw/zipos/Makefile<br />~ /s6soc/trunk/sw/zipos/swint.h<br />dgisselqSun, 15 May 2016 01:33:07 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=29Fixed a small lint bug associated with the scope vs ...
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=28
<div><strong>Rev 28 - dgisselq</strong> (1 file(s) modified)</div><div>Fixed a small lint bug associated with the scope vs ...</div>~ /s6soc/trunk/rtl/busmaster.v<br />dgisselqTue, 10 May 2016 14:50:12 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=28Added a bootloader capability so that pieces of the program ...
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=27
<div><strong>Rev 27 - dgisselq</strong> (11 file(s) modified)</div><div>Added a bootloader capability so that pieces of the program ...</div>+ /s6soc/trunk/sw/zipos/bootloader.c<br />+ /s6soc/trunk/sw/zipos/cmodram.ld<br />~ /s6soc/trunk/sw/zipos/doorbell.c<br />~ /s6soc/trunk/sw/zipos/kernel.c<br />+ /s6soc/trunk/sw/zipos/ksetup.c<br />~ /s6soc/trunk/sw/zipos/Makefile<br />+ /s6soc/trunk/sw/zipos/pipesetup.c<br />~ /s6soc/trunk/sw/zipos/resetdump.s<br />~ /s6soc/trunk/sw/zipos/syspipe.c<br />~ /s6soc/trunk/sw/zipos/syspipe.h<br />~ /s6soc/trunk/sw/zipos/zipsys.h<br />dgisselqTue, 10 May 2016 14:33:05 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=27Modified to be able to handle different load from virtual ...
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=26
<div><strong>Rev 26 - dgisselq</strong> (1 file(s) modified)</div><div>Modified to be able to handle different load from virtual ...</div>~ /s6soc/trunk/sw/host/zipload.cpp<br />dgisselqTue, 10 May 2016 14:30:27 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=26Converted timer B to be a non-reloadable watchdog timer.
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=25
<div><strong>Rev 25 - dgisselq</strong> (2 file(s) modified)</div><div>Converted timer B to be a non-reloadable watchdog timer.</div>~ /s6soc/trunk/rtl/altbusmaster.v<br />~ /s6soc/trunk/rtl/busmaster.v<br />dgisselqTue, 10 May 2016 14:28:59 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=25Made the ziptimer autoreload feature a parameter (dis)abled option.
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=24
<div><strong>Rev 24 - dgisselq</strong> (1 file(s) modified)</div><div>Made the ziptimer autoreload feature a parameter (dis)abled option.</div>~ /s6soc/trunk/rtl/cpu/ziptimer.v<br />dgisselqTue, 10 May 2016 14:13:54 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=24Fixed a bug which caused every instruction to be loaded/prefetched ...
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=23
<div><strong>Rev 23 - dgisselq</strong> (1 file(s) modified)</div><div>Fixed a bug which caused every instruction to be loaded/prefetched ...</div>~ /s6soc/trunk/rtl/cpu/zipcpu.v<br />dgisselqTue, 10 May 2016 14:12:42 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=23Initial version of the ZipOS operating system construct(s).
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=22
<div><strong>Rev 22 - dgisselq</strong> (20 file(s) modified)</div><div>Initial version of the ZipOS operating system construct(s).</div>+ /s6soc/trunk/sw/zipos<br />+ /s6soc/trunk/sw/zipos/board.h<br />+ /s6soc/trunk/sw/zipos/cmod.ld<br />+ /s6soc/trunk/sw/zipos/doorbell.c<br />+ /s6soc/trunk/sw/zipos/errno.h<br />+ /s6soc/trunk/sw/zipos/kernel.c<br />+ /s6soc/trunk/sw/zipos/kfildes.h<br />+ /s6soc/trunk/sw/zipos/ksched.h<br />+ /s6soc/trunk/sw/zipos/ktraps.h<br />+ /s6soc/trunk/sw/zipos/Makefile<br />+ /s6soc/trunk/sw/zipos/resetdump.s<br />+ /s6soc/trunk/sw/zipos/swint.h<br />+ /s6soc/trunk/sw/zipos/syspipe.c<br />+ /s6soc/trunk/sw/zipos/syspipe.h<br />+ /s6soc/trunk/sw/zipos/taskp.c<br />+ /s6soc/trunk/sw/zipos/taskp.h<br />+ /s6soc/trunk/sw/zipos/ziplib.c<br />+ /s6soc/trunk/sw/zipos/ziplib.h<br />+ /s6soc/trunk/sw/zipos/zipsys.c<br />+ /s6soc/trunk/sw/zipos/zipsys.h<br />dgisselqFri, 06 May 2016 16:03:08 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=22Adds two device drivers: one for the SPI display, and ...
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=21
<div><strong>Rev 21 - dgisselq</strong> (4 file(s) modified)</div><div>Adds two device drivers: one for the SPI display, and ...</div>~ /s6soc/trunk/sw/dev/display.c<br />~ /s6soc/trunk/sw/dev/display.h<br />~ /s6soc/trunk/sw/dev/rtcsim.c<br />~ /s6soc/trunk/sw/dev/rtcsim.h<br />dgisselqFri, 06 May 2016 15:27:02 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=21This linker description file acknowledges a .fixdata section which can ...
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=20
<div><strong>Rev 20 - dgisselq</strong> (1 file(s) modified)</div><div>This linker description file acknowledges a .fixdata section which can ...</div>~ /s6soc/trunk/sw/dev/cmod.ld<br />dgisselqFri, 06 May 2016 15:24:42 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=20Addition of dumpuart.cpp to dump the UART transactions to a ...
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=19
<div><strong>Rev 19 - dgisselq</strong> (4 file(s) modified)</div><div>Addition of dumpuart.cpp to dump the UART transactions to a ...</div>+ /s6soc/trunk/sw/host/dumpuart.cpp<br />~ /s6soc/trunk/sw/host/flashdrvr.cpp<br />~ /s6soc/trunk/sw/host/Makefile<br />~ /s6soc/trunk/sw/host/zipload.cpp<br />dgisselqFri, 06 May 2016 15:23:08 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=19Added a picture of the device pinouts to the specification.
https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=18
<div><strong>Rev 18 - dgisselq</strong> (3 file(s) modified)</div><div>Added a picture of the device pinouts to the specification.</div>~ /s6soc/trunk/doc/gfx/pinout.eps<br />~ /s6soc/trunk/doc/spec.pdf<br />~ /s6soc/trunk/doc/src/spec.tex<br />dgisselqFri, 06 May 2016 15:18:20 +0100https://opencores.org/websvn//websvn/revision?repname=s6soc&path=%2Fs6soc%2Ftrunk%2F&rev=18