URL
https://opencores.org/ocsvn/uart_fpga_slow_control_migrated/uart_fpga_slow_control_migrated/trunk
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uart_fpga_slow_control_migrated
WebSVN RSS feed - uart_fpga_slow_control_migrated
https://opencores.org/websvn//websvn/listing?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&
Thu, 28 Mar 2024 20:09:25 +0100
FeedCreator 1.7.2
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ADDED: Philips_PC16550dn_datasheet.pdf
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=34
<div><strong>Rev 34 - aborga</strong> (1 file(s) modified)</div><div>ADDED: Philips_PC16550dn_datasheet.pdf</div>+ /uart_fpga_slow_control/trunk/documents/Philips_PC16550dn_datasheet.pdf<br />
aborga
Wed, 11 Apr 2012 07:36:57 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=34
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UPDATE: visio simplified diagram
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=33
<div><strong>Rev 33 - aborga</strong> (1 file(s) modified)</div><div>UPDATE: visio simplified diagram</div>~ /uart_fpga_slow_control/trunk/documents/UART_main_diagram.vsd<br />
aborga
Wed, 23 Nov 2011 14:37:21 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=33
-
ADDED: OpenCores_description_html.txt
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=32
<div><strong>Rev 32 - aborga</strong> (1 file(s) modified)</div><div>ADDED: OpenCores_description_html.txt</div>+ /uart_fpga_slow_control/trunk/documents/OpenCores_description_html.txt<br />
aborga
Tue, 22 Nov 2011 15:23:24 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=32
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ADDED: html version of the different site section back-upped in ...
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=31
<div><strong>Rev 31 - aborga</strong> (3 file(s) modified)</div><div>ADDED: html version of the different site section back-upped in ...</div>+ /uart_fpga_slow_control/trunk/documents/HardwareDescription.txt<br />+ /uart_fpga_slow_control/trunk/documents/HardwareDescription_html.txt<br />+ /uart_fpga_slow_control/trunk/documents/SoftwareFolder_html.txt<br />
aborga
Tue, 22 Nov 2011 13:41:38 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=31
-
MODIFIED: cosmetic changes on the SoftwareFolder.txt file
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=30
<div><strong>Rev 30 - aborga</strong> (1 file(s) modified)</div><div>MODIFIED: cosmetic changes on the SoftwareFolder.txt file</div>~ /uart_fpga_slow_control/trunk/documents/SoftwareFolder.txt<br />
aborga
Tue, 22 Nov 2011 12:28:54 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=30
-
UPDATED: project documentation for the new software features
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=29
<div><strong>Rev 29 - aborga</strong> (4 file(s) modified)</div><div>UPDATED: project documentation for the new software features</div>+ /uart_fpga_slow_control/trunk/documents/Hex_commands.bin<br />~ /uart_fpga_slow_control/trunk/documents/OpenCores_description.txt<br />+ /uart_fpga_slow_control/trunk/documents/RealTerm_line_commands.txt<br />+ /uart_fpga_slow_control/trunk/documents/SoftwareFolder.txt<br />
aborga
Tue, 22 Nov 2011 12:21:58 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=29
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ADDED: software folder with python script (simple but stable) and ...
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=28
<div><strong>Rev 28 - aborga</strong> (3 file(s) modified)</div><div>ADDED: software folder with python script (simple but stable) and ...</div>+ /uart_fpga_slow_control/trunk/software<br />+ /uart_fpga_slow_control/trunk/software/py_serial_control.py<br />+ /uart_fpga_slow_control/trunk/software/rtd_uart_test.bat<br />
aborga
Tue, 22 Nov 2011 11:58:39 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=28
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MODIFIED: small description improvement
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=27
<div><strong>Rev 27 - aborga</strong> (1 file(s) modified)</div><div>MODIFIED: small description improvement</div>~ /uart_fpga_slow_control/trunk/documents/OpenCores_description.txt<br />
aborga
Tue, 15 Nov 2011 11:47:54 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=27
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ADDED: screenshot of the simulation output with tb_uart_control.vhd (project tested ...
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=26
<div><strong>Rev 26 - aborga</strong> (1 file(s) modified)</div><div>ADDED: screenshot of the simulation output with tb_uart_control.vhd (project tested ...</div>+ /uart_fpga_slow_control/trunk/documents/testbench_wave.PNG<br />
aborga
Fri, 02 Sep 2011 14:18:55 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=26
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MODIFIED: small comment improvement
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=25
<div><strong>Rev 25 - aborga</strong> (1 file(s) modified)</div><div>MODIFIED: small comment improvement</div>~ /uart_fpga_slow_control/trunk/code/testbenches/tb_UART_control.vhd<br />
aborga
Fri, 02 Sep 2011 12:15:04 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=25
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UPDATED: added folder testbenches with a generic tb_UART_control.vhd testbench
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=24
<div><strong>Rev 24 - aborga</strong> (2 file(s) modified)</div><div>UPDATED: added folder testbenches with a generic tb_UART_control.vhd testbench</div>+ /uart_fpga_slow_control/trunk/code/testbenches<br />+ /uart_fpga_slow_control/trunk/code/testbenches/tb_UART_control.vhd<br />
aborga
Fri, 02 Sep 2011 12:00:19 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=24
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MODIFIED:
renamed lantronix_input and lantronix_output (historical)
to uart_din and uart_dout ...
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=23
<div><strong>Rev 23 - aborga</strong> (1 file(s) modified)</div><div>MODIFIED: <br />
<br />
renamed lantronix_input and lantronix_output (historical)<br />
to uart_din and uart_dout for ...</div>~ /uart_fpga_slow_control/trunk/code/ab_top.vhd<br />
aborga
Fri, 02 Sep 2011 10:50:57 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=23
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...
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=22
<div><strong>Rev 22 - aborga</strong> (1 file(s) modified)</div><div>...</div>~ /uart_fpga_slow_control/trunk/code/ab_top.vhd<br />
aborga
Fri, 02 Sep 2011 10:06:38 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=22
-
MODIFIED:
renamed lantronix_input and lantronix_output (historical)
to uart_din and uart_dout ...
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=21
<div><strong>Rev 21 - aborga</strong> (1 file(s) modified)</div><div>MODIFIED: <br />
<br />
renamed lantronix_input and lantronix_output (historical)<br />
to uart_din and uart_dout for ...</div>~ /uart_fpga_slow_control/trunk/code/ab_top.vhd<br />
aborga
Fri, 02 Sep 2011 09:49:56 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=21
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MODIFIED: block diagram with new namings for uart din and ...
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=20
<div><strong>Rev 20 - aborga</strong> (2 file(s) modified)</div><div>MODIFIED: block diagram with new namings for uart din and ...</div>~ /uart_fpga_slow_control/trunk/documents/UART_FPGA_slow_control_main_diagram.pdf<br />~ /uart_fpga_slow_control/trunk/documents/UART_main_diagram.vsd<br />
aborga
Fri, 02 Sep 2011 09:45:11 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=20
-
MODIFIED:
renamed lantronix_input and lantronix_output (historical)
to uart_din and uart_dout ...
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=19
<div><strong>Rev 19 - aborga</strong> (6 file(s) modified)</div><div>MODIFIED: <br />
<br />
renamed lantronix_input and lantronix_output (historical)<br />
to uart_din and uart_dout for ...</div>~ /uart_fpga_slow_control/trunk/code/ab_register_rx_handler.vhd<br />~ /uart_fpga_slow_control/trunk/code/ab_register_tx_handler.vhd<br />~ /uart_fpga_slow_control/trunk/code/ab_top.vhd<br />~ /uart_fpga_slow_control/trunk/code/ab_uart_16550_wrapper.vhd<br />~ /uart_fpga_slow_control/trunk/code/ab_uart_lbus_slave.vhd<br />~ /uart_fpga_slow_control/trunk/code/gh_uart_16550.vhd<br />
aborga
Fri, 02 Sep 2011 09:40:11 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=19
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MODIFIED: removed unnecessary libraries
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=18
<div><strong>Rev 18 - aborga</strong> (1 file(s) modified)</div><div>MODIFIED: removed unnecessary libraries</div>~ /uart_fpga_slow_control/trunk/code/ab_top.vhd<br />
aborga
Thu, 01 Sep 2011 13:01:11 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=18
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DELETED: useless package folder
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=17
<div><strong>Rev 17 - aborga</strong> (1 file(s) modified)</div><div>DELETED: useless package folder</div>- /uart_fpga_slow_control/trunk/package<br />
aborga
Thu, 01 Sep 2011 11:20:00 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=17
-
MODIFIED: added
uart_rst_i ...
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=16
<div><strong>Rev 16 - aborga</strong> (1 file(s) modified)</div><div>MODIFIED: added <br />
<br />
uart_rst_i ...</div>~ /uart_fpga_slow_control/trunk/code/ab_top.vhd<br />
aborga
Thu, 01 Sep 2011 11:19:06 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=16
-
UPDATED: email address
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=15
<div><strong>Rev 15 - aborga</strong> (4 file(s) modified)</div><div>UPDATED: email address</div>~ /uart_fpga_slow_control/trunk/code/ab_register_rx_handler.vhd<br />~ /uart_fpga_slow_control/trunk/code/ab_register_tx_handler.vhd<br />~ /uart_fpga_slow_control/trunk/code/ab_uart_16550_wrapper.vhd<br />~ /uart_fpga_slow_control/trunk/code/ab_uart_lbus_slave.vhd<br />
aborga
Tue, 30 Aug 2011 12:33:43 +0100
https://opencores.org/websvn//websvn/revision?repname=uart_fpga_slow_control_migrated&path=%2Fuart_fpga_slow_control%2F&rev=15
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