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versatile_library
WebSVN RSS feed - versatile_library
https://opencores.org/websvn//websvn/listing?repname=versatile_library&path=%2Fversatile_library%2F&
Fri, 29 Mar 2024 15:48:49 +0100
FeedCreator 1.7.2
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added binary counters
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=22
<div><strong>Rev 22 - unneback</strong> (6 file(s) modified)</div><div>added binary counters</div>+ /versatile_library/trunk/rtl/verilog/cnt_bin.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_bin_clear.csv<br />~ /versatile_library/trunk/rtl/verilog/Makefile<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Sun, 12 Dec 2010 17:25:59 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=22
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reg -> wire in and or mux in logic
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=21
<div><strong>Rev 21 - unneback</strong> (5 file(s) modified)</div><div>reg -> wire in and or mux in logic</div>~ /versatile_library/trunk/rtl/verilog/clk_and_reset.v<br />~ /versatile_library/trunk/rtl/verilog/memories.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Sat, 11 Dec 2010 21:17:47 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=21
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naming convention vl_
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=20
<div><strong>Rev 20 - unneback</strong> (1 file(s) modified)</div><div>naming convention vl_</div>~ /versatile_library/trunk/doc/Versatile_library.pdf<br />
unneback
Fri, 10 Dec 2010 10:31:05 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=20
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naming convention vl_
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=19
<div><strong>Rev 19 - unneback</strong> (1 file(s) modified)</div><div>naming convention vl_</div>~ /versatile_library/trunk/doc/src/Versatile_library.odt<br />
unneback
Fri, 10 Dec 2010 10:30:47 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=19
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naming convention vl_
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=18
<div><strong>Rev 18 - unneback</strong> (24 file(s) modified)</div><div>naming convention vl_</div>~ /versatile_library/trunk/doc/src/Versatile_library.odt<br />~ /versatile_library/trunk/doc/Versatile_library.pdf<br />+ /versatile_library/trunk/rtl/verilog/arith.v<br />~ /versatile_library/trunk/rtl/verilog/clk_and_reset.v<br />~ /versatile_library/trunk/rtl/verilog/cnt_bin_ce.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_bin_ce_clear.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_bin_ce_clear_set_rew.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_bin_ce_rew_l1.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_gray.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_gray_ce.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_gray_ce_bin.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_lfsr.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_lfsr_ce.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_lfsr_ce_rew_l1.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_lfsr_ce_zq.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_lfsr_zq.csv<br />~ /versatile_library/trunk/rtl/verilog/counters.v<br />~ /versatile_library/trunk/rtl/verilog/Makefile<br />~ /versatile_library/trunk/rtl/verilog/memories.v<br />~ /versatile_library/trunk/rtl/verilog/registers.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />~ /versatile_library/trunk/rtl/verilog/wb.v<br />
unneback
Fri, 10 Dec 2010 10:09:44 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=18
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...
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=17
<div><strong>Rev 17 - unneback</strong> (8 file(s) modified)</div><div>...</div>~ /versatile_library/trunk/doc/src/Versatile_library.odt<br />~ /versatile_library/trunk/doc/Versatile_library.pdf<br />~ /versatile_library/trunk/rtl/verilog/clk_and_reset.v<br />~ /versatile_library/trunk/rtl/verilog/registers.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />~ /versatile_library/trunk/rtl/verilog/wb.v<br />
unneback
Thu, 07 Oct 2010 20:51:47 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=17
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converting utility for ROM
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=16
<div><strong>Rev 16 - unneback</strong> (4 file(s) modified)</div><div>converting utility for ROM</div>+ /versatile_library/trunk/utils<br />+ /versatile_library/trunk/utils/bin2vlogarray<br />+ /versatile_library/trunk/utils/bin2vlogarray/bin2vlogarray<br />+ /versatile_library/trunk/utils/bin2vlogarray/bin2vlogarray.c<br />
unneback
Thu, 07 Oct 2010 09:35:42 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=16
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added delay line
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=15
<div><strong>Rev 15 - unneback</strong> (6 file(s) modified)</div><div>added delay line</div>~ /versatile_library/trunk/doc/src/Versatile_library.odt<br />~ /versatile_library/trunk/doc/Versatile_library.pdf<br />~ /versatile_library/trunk/rtl/verilog/registers.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Fri, 01 Oct 2010 13:04:39 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=15
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reg -> wire for various signals
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=14
<div><strong>Rev 14 - unneback</strong> (5 file(s) modified)</div><div>reg -> wire for various signals</div>~ /versatile_library/trunk/rtl/verilog/memories.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />~ /versatile_library/trunk/rtl/verilog/wb.v<br />
unneback
Fri, 01 Oct 2010 07:55:27 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=14
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cosmetic update
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=13
<div><strong>Rev 13 - unneback</strong> (4 file(s) modified)</div><div>cosmetic update</div>~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />~ /versatile_library/trunk/rtl/verilog/wb.v<br />
unneback
Fri, 01 Oct 2010 06:24:54 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=13
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added wishbone comliant modules
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=12
<div><strong>Rev 12 - unneback</strong> (5 file(s) modified)</div><div>added wishbone comliant modules</div>~ /versatile_library/trunk/rtl/verilog/Makefile<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />+ /versatile_library/trunk/rtl/verilog/wb.v<br />
unneback
Thu, 30 Sep 2010 10:25:35 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=12
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async fifo simplex
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=11
<div><strong>Rev 11 - unneback</strong> (6 file(s) modified)</div><div>async fifo simplex</div>~ /versatile_library/trunk/doc/src/Versatile_library.odt<br />~ /versatile_library/trunk/doc/Versatile_library.pdf<br />~ /versatile_library/trunk/rtl/verilog/memories.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Wed, 29 Sep 2010 19:33:37 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=11
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added dff_ce_clear
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=10
<div><strong>Rev 10 - unneback</strong> (4 file(s) modified)</div><div>added dff_ce_clear</div>~ /versatile_library/trunk/rtl/verilog/registers.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Mon, 27 Sep 2010 20:41:22 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=10
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added dff_ce_clear
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=9
<div><strong>Rev 9 - unneback</strong> (2 file(s) modified)</div><div>added dff_ce_clear</div>~ /versatile_library/trunk/doc/src/Versatile_library.odt<br />~ /versatile_library/trunk/doc/Versatile_library.pdf<br />
unneback
Mon, 27 Sep 2010 20:37:03 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=9
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added dff_ce_clear
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=8
<div><strong>Rev 8 - unneback</strong> (4 file(s) modified)</div><div>added dff_ce_clear</div>~ /versatile_library/trunk/rtl/verilog/registers.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Mon, 27 Sep 2010 20:32:04 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=8
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mem update
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=7
<div><strong>Rev 7 - unneback</strong> (4 file(s) modified)</div><div>mem update</div>~ /versatile_library/trunk/rtl/verilog/memories.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Mon, 27 Sep 2010 19:41:15 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=7
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added library files
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=6
<div><strong>Rev 6 - unneback</strong> (3 file(s) modified)</div><div>added library files</div>+ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />+ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />+ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Tue, 14 Sep 2010 19:17:41 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=6
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memories added
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=5
<div><strong>Rev 5 - unneback</strong> (6 file(s) modified)</div><div>memories added</div>~ /versatile_library/trunk/doc/src/Versatile_library.odt<br />~ /versatile_library/trunk/doc/Versatile_library.pdf<br />~ /versatile_library/trunk/rtl/verilog/counters.v<br />~ /versatile_library/trunk/rtl/verilog/Makefile<br />+ /versatile_library/trunk/rtl/verilog/memories.v<br />~ /versatile_library/trunk/rtl/verilog/registers.v<br />
unneback
Tue, 14 Sep 2010 18:49:32 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=5
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added counters
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=4
<div><strong>Rev 4 - unneback</strong> (15 file(s) modified)</div><div>added counters</div>~ /versatile_library/trunk/doc/src/Versatile_library.odt<br />~ /versatile_library/trunk/doc/Versatile_library.pdf<br />~ /versatile_library/trunk/rtl/verilog/clk_and_reset.v<br />+ /versatile_library/trunk/rtl/verilog/cnt_bin_ce.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_bin_ce_clear.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_bin_ce_clear_set_rew.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_bin_ce_rew_l1.csv<br />- /versatile_library/trunk/rtl/verilog/cnt_gray.csv<br />- /versatile_library/trunk/rtl/verilog/cnt_gray_bin_ce.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_gray_ce_bin.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_lfsr_ce_rew_l1.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_lfsr_ce_zq.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_lfsr_zq.csv<br />~ /versatile_library/trunk/rtl/verilog/counters.v<br />~ /versatile_library/trunk/rtl/verilog/Makefile<br />
unneback
Fri, 10 Sep 2010 15:10:15 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=4
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various updates
counter added
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=3
<div><strong>Rev 3 - unneback</strong> (11 file(s) modified)</div><div>various updates<br />
counter added</div>~ /versatile_library/trunk/doc/src/Versatile_library.odt<br />+ /versatile_library/trunk/rtl/verilog/clk_and_reset.v<br />+ /versatile_library/trunk/rtl/verilog/cnt_gray.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_gray_bin_ce.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_gray_ce.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_lfsr.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_lfsr_ce.csv<br />+ /versatile_library/trunk/rtl/verilog/counters.v<br />+ /versatile_library/trunk/rtl/verilog/Makefile<br />+ /versatile_library/trunk/rtl/verilog/registers.v<br />+ /versatile_library/trunk/rtl/verilog/versatile_counter_defines.v<br />
unneback
Tue, 07 Sep 2010 19:54:40 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2F&rev=3
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