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versatile_library
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https://opencores.org/websvn//websvn/listing?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&
Mon, 09 Mar 2026 23:46:53 +0100
FeedCreator 1.7.2
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corrected polynom with length 20
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=37
<div><strong>Rev 37 - unneback</strong> (3 file(s) modified)</div><div>corrected polynom with length 20</div>~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Thu, 27 Jan 2011 16:35:38 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=37
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added generic andor_mux
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=36
<div><strong>Rev 36 - unneback</strong> (4 file(s) modified)</div><div>added generic andor_mux</div>~ /versatile_library/trunk/rtl/verilog/logic.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Wed, 26 Jan 2011 08:03:57 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=36
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added vl_mux2_andor and vl_mux3_andor localparam
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=35
<div><strong>Rev 35 - unneback</strong> (4 file(s) modified)</div><div>added vl_mux2_andor and vl_mux3_andor localparam</div>~ /versatile_library/trunk/rtl/verilog/logic.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Tue, 25 Jan 2011 20:56:38 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=35
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added vl_mux2_andor and vl_mux3_andor
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=34
<div><strong>Rev 34 - unneback</strong> (4 file(s) modified)</div><div>added vl_mux2_andor and vl_mux3_andor</div>~ /versatile_library/trunk/rtl/verilog/logic.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Tue, 25 Jan 2011 20:53:04 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=34
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updated wb3wb3_bridge
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=33
<div><strong>Rev 33 - unneback</strong> (6 file(s) modified)</div><div>updated wb3wb3_bridge</div>~ /versatile_library/trunk/rtl/verilog/clk_and_reset.v<br />~ /versatile_library/trunk/rtl/verilog/Makefile<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />~ /versatile_library/trunk/rtl/verilog/wb.v<br />
unneback
Wed, 12 Jan 2011 18:51:22 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=33
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added vl_pll for ALTERA (cycloneIII)
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=32
<div><strong>Rev 32 - unneback</strong> (7 file(s) modified)</div><div>added vl_pll for ALTERA (cycloneIII)</div>~ /versatile_library/trunk/rtl/verilog/clk_and_reset.v<br />+ /versatile_library/trunk/rtl/verilog/cnt_lfsr_ce_q_zq.csv<br />+ /versatile_library/trunk/rtl/verilog/logic.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />~ /versatile_library/trunk/rtl/verilog/wb.v<br />
unneback
Wed, 05 Jan 2011 08:58:06 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=32
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sync FIFO updated
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=31
<div><strong>Rev 31 - unneback</strong> (4 file(s) modified)</div><div>sync FIFO updated</div>~ /versatile_library/trunk/rtl/verilog/memories.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Thu, 16 Dec 2010 13:30:46 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=31
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updated counter for level1 and level2 function
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=30
<div><strong>Rev 30 - unneback</strong> (4 file(s) modified)</div><div>updated counter for level1 and level2 function</div>~ /versatile_library/trunk/rtl/verilog/cnt_bin_ce_clear_l1_l2.csv<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Thu, 16 Dec 2010 13:08:21 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=30
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updated counter for level1 and level2 function
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=29
<div><strong>Rev 29 - unneback</strong> (6 file(s) modified)</div><div>updated counter for level1 and level2 function</div>+ /versatile_library/trunk/rtl/verilog/cnt_bin_ce_clear_l1_l2.csv<br />~ /versatile_library/trunk/rtl/verilog/Makefile<br />~ /versatile_library/trunk/rtl/verilog/registers.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Thu, 16 Dec 2010 13:05:32 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=29
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added sync simplex FIFO
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=28
<div><strong>Rev 28 - unneback</strong> (4 file(s) modified)</div><div>added sync simplex FIFO</div>~ /versatile_library/trunk/rtl/verilog/memories.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Wed, 15 Dec 2010 11:50:23 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=28
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added sync simplex FIFO
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=27
<div><strong>Rev 27 - unneback</strong> (4 file(s) modified)</div><div>added sync simplex FIFO</div>~ /versatile_library/trunk/rtl/verilog/memories.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Wed, 15 Dec 2010 11:48:53 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=27
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typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=26
<div><strong>Rev 26 - unneback</strong> (4 file(s) modified)</div><div>typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q</div>+ /versatile_library/trunk/rtl/verilog/cnt_lfsr_ce_clear_q.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_lfsr_ce_q.csv<br />~ /versatile_library/trunk/rtl/verilog/Makefile<br />~ /versatile_library/trunk/rtl/verilog/memories.v<br />
unneback
Wed, 15 Dec 2010 10:32:45 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=26
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added sync FIFO
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=25
<div><strong>Rev 25 - unneback</strong> (7 file(s) modified)</div><div>added sync FIFO</div>+ /versatile_library/trunk/rtl/verilog/cnt_bin_ce_rew_q_zq_l1.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_bin_ce_rew_zq_l1.csv<br />~ /versatile_library/trunk/rtl/verilog/Makefile<br />~ /versatile_library/trunk/rtl/verilog/memories.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Tue, 14 Dec 2010 20:58:04 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=25
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added vl_dff_ce_set
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=24
<div><strong>Rev 24 - unneback</strong> (4 file(s) modified)</div><div>added vl_dff_ce_set</div>~ /versatile_library/trunk/rtl/verilog/registers.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Mon, 13 Dec 2010 13:16:58 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=24
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fixed port map error in async fifo 1r1w
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=23
<div><strong>Rev 23 - unneback</strong> (4 file(s) modified)</div><div>fixed port map error in async fifo 1r1w</div>~ /versatile_library/trunk/rtl/verilog/memories.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Sun, 12 Dec 2010 22:38:01 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=23
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added binary counters
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=22
<div><strong>Rev 22 - unneback</strong> (6 file(s) modified)</div><div>added binary counters</div>+ /versatile_library/trunk/rtl/verilog/cnt_bin.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_bin_clear.csv<br />~ /versatile_library/trunk/rtl/verilog/Makefile<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Sun, 12 Dec 2010 17:25:59 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=22
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reg -> wire in and or mux in logic
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=21
<div><strong>Rev 21 - unneback</strong> (5 file(s) modified)</div><div>reg -> wire in and or mux in logic</div>~ /versatile_library/trunk/rtl/verilog/clk_and_reset.v<br />~ /versatile_library/trunk/rtl/verilog/memories.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />
unneback
Sat, 11 Dec 2010 21:17:47 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=21
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naming convention vl_
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=20
<div><strong>Rev 20 - unneback</strong> (1 file(s) modified)</div><div>naming convention vl_</div>~ /versatile_library/trunk/doc/Versatile_library.pdf<br />
unneback
Fri, 10 Dec 2010 10:31:05 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=20
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naming convention vl_
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=19
<div><strong>Rev 19 - unneback</strong> (1 file(s) modified)</div><div>naming convention vl_</div>~ /versatile_library/trunk/doc/src/Versatile_library.odt<br />
unneback
Fri, 10 Dec 2010 10:30:47 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=19
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naming convention vl_
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=18
<div><strong>Rev 18 - unneback</strong> (24 file(s) modified)</div><div>naming convention vl_</div>~ /versatile_library/trunk/doc/src/Versatile_library.odt<br />~ /versatile_library/trunk/doc/Versatile_library.pdf<br />+ /versatile_library/trunk/rtl/verilog/arith.v<br />~ /versatile_library/trunk/rtl/verilog/clk_and_reset.v<br />~ /versatile_library/trunk/rtl/verilog/cnt_bin_ce.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_bin_ce_clear.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_bin_ce_clear_set_rew.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_bin_ce_rew_l1.csv<br />+ /versatile_library/trunk/rtl/verilog/cnt_gray.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_gray_ce.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_gray_ce_bin.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_lfsr.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_lfsr_ce.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_lfsr_ce_rew_l1.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_lfsr_ce_zq.csv<br />~ /versatile_library/trunk/rtl/verilog/cnt_lfsr_zq.csv<br />~ /versatile_library/trunk/rtl/verilog/counters.v<br />~ /versatile_library/trunk/rtl/verilog/Makefile<br />~ /versatile_library/trunk/rtl/verilog/memories.v<br />~ /versatile_library/trunk/rtl/verilog/registers.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_actel.v<br />~ /versatile_library/trunk/rtl/verilog/versatile_library_altera.v<br />~ /versatile_library/trunk/rtl/verilog/wb.v<br />
unneback
Fri, 10 Dec 2010 10:09:44 +0100
https://opencores.org/websvn//websvn/revision?repname=versatile_library&path=%2Fversatile_library%2Ftrunk%2F&rev=18
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