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wb_lpc WebSVN RSS feed - wb_lpc https://opencores.org/websvn//websvn/listing?repname=wb_lpc&path=& Fri, 28 Feb 2020 01:25:39 +0100 FeedCreator 1.7.2 Added old uploaded documents to new repository. https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=22 <div><strong>Rev 22 - root</strong> (5 file(s) modified)</div><div>Added old uploaded documents to new repository.</div>- /wb_lpc/web_uploads/oc_checkin.sh<br />- /wb_lpc/web_uploads/oc_cvs_checkin.sh<br />- /wb_lpc/web_uploads/svn_checkin.log<br />- /wb_lpc/web_uploads/svn_checkin.sh<br />- /wb_lpc/web_uploads/temp.sh<br /> root Tue, 10 Mar 2009 16:06:19 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=22 Added old uploaded documents to new repository. https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=21 <div><strong>Rev 21 - root</strong> (5 file(s) modified)</div><div>Added old uploaded documents to new repository.</div>+ /wb_lpc/web_uploads/oc_checkin.sh<br />+ /wb_lpc/web_uploads/oc_cvs_checkin.sh<br />+ /wb_lpc/web_uploads/svn_checkin.log<br />+ /wb_lpc/web_uploads/svn_checkin.sh<br />+ /wb_lpc/web_uploads/temp.sh<br /> root Tue, 10 Mar 2009 10:38:19 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=21 New directory structure. https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=20 <div><strong>Rev 20 - root</strong> (8 file(s) modified)</div><div>New directory structure.</div>- /branches<br />- /tags<br />- /trunk<br />+ /wb_lpc<br />+ /wb_lpc/branches<br />+ /wb_lpc/tags<br />+ /wb_lpc/trunk<br />+ /wb_lpc/web_uploads<br /> root Tue, 10 Mar 2009 10:37:49 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=20 Serirq: incorrect stop frame: * The stop ... https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=19 <div><strong>Rev 19 - hharte</strong> (3 file(s) modified)</div><div>Serirq: incorrect stop frame:<br /> * The stop ...</div>~ /trunk/rtl/verilog/serirq_defines.v<br />~ /trunk/rtl/verilog/serirq_host.v<br />~ /trunk/rtl/verilog/serirq_slave.v<br /> hharte Sat, 27 Dec 2008 19:46:18 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=19 Corrected some minor mistakes, added information about error reporting. https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=18 <div><strong>Rev 18 - hharte</strong> (1 file(s) modified)</div><div>Corrected some minor mistakes, added information about error reporting.</div>~ /trunk/doc/wb_lpc.pdf<br /> hharte Sat, 26 Jul 2008 20:01:23 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=18 Fix bugs: 25-Jul-2008 LPC firmware writes must not insert wait-states. 22-Jul-2008 LPC ... https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=17 <div><strong>Rev 17 - hharte</strong> (12 file(s) modified)</div><div>Fix bugs:<br /> 25-Jul-2008 LPC firmware writes must not insert wait-states.<br /> 22-Jul-2008 LPC ...</div>~ /trunk/examples/lpc_7seg/lpc_7seg.bit<br />~ /trunk/examples/lpc_7seg/lpc_7seg.ise<br />~ /trunk/examples/lpc_7seg/top_lpc_7seg.v<br />~ /trunk/examples/pci_lpc/pci_lpc.ise<br />~ /trunk/examples/pci_lpc/pci_lpc_host.bit<br />~ /trunk/examples/pci_lpc/top_pci_lpc_host.v<br />~ /trunk/rtl/verilog/wb_lpc_defines.v<br />~ /trunk/rtl/verilog/wb_lpc_host.v<br />~ /trunk/rtl/verilog/wb_lpc_periph.v<br />~ /trunk/rtl/verilog/wb_regfile.v<br />~ /trunk/sim/wb_lpc_sim/tb_lpc_top.v<br />~ /trunk/sim/wb_lpc_sim/wb_lpc_sim.ise<br /> hharte Sat, 26 Jul 2008 19:15:32 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=17 Fix bug: Spec violation for multi-byte firmware accesses Built with ISE ... https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=16 <div><strong>Rev 16 - hharte</strong> (2 file(s) modified)</div><div>Fix bug: Spec violation for multi-byte firmware accesses<br /> Built with ISE ...</div>~ /trunk/examples/lpc_7seg/lpc_7seg.bit<br />~ /trunk/examples/pci_lpc/pci_lpc_host.bit<br /> hharte Tue, 22 Jul 2008 13:55:16 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=16 fixed bug: Spec vviolation for multi-byte firmware amcesses: the multi-byte firmware ... https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=15 <div><strong>Rev 15 - hharte</strong> (2 file(s) modified)</div><div>fixed bug: Spec vviolation for multi-byte firmware amcesses:<br /> the multi-byte firmware ...</div>~ /trunk/rtl/verilog/wb_lpc_host.v<br />~ /trunk/rtl/verilog/wb_lpc_periph.v<br /> hharte Tue, 22 Jul 2008 13:46:42 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=15 Update for Xilinx ISE 10.1 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=14 <div><strong>Rev 14 - hharte</strong> (5 file(s) modified)</div><div>Update for Xilinx ISE 10.1</div>~ /trunk/examples/lpc_7seg/lpc_7seg.ise<br />~ /trunk/examples/lpc_7seg/lpc_7seg.ucf<br />~ /trunk/examples/pci_lpc/pci_lpc.ise<br />~ /trunk/sim/serirq_sim/serirq_sim.ise<br />~ /trunk/sim/wb_lpc_sim/wb_lpc_sim.ise<br /> hharte Tue, 22 Jul 2008 04:16:22 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=14 Add testbench for serirq. https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=13 <div><strong>Rev 13 - hharte</strong> (6 file(s) modified)</div><div>Add testbench for serirq.</div>~ /trunk/examples/lpc_7seg/lpc_7seg.ise<br />~ /trunk/examples/pci_lpc<br />~ /trunk/examples/README.TXT<br />+ /trunk/sim/serirq_sim<br />+ /trunk/sim/serirq_sim/serirq_sim.ise<br />+ /trunk/sim/serirq_sim/tb_serirq_top.v<br /> hharte Tue, 11 Mar 2008 04:39:50 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=13 Add serirq support and add DCM block to de-skew LPC_CLK ... https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=12 <div><strong>Rev 12 - hharte</strong> (4 file(s) modified)</div><div>Add serirq support and add DCM block to de-skew LPC_CLK ...</div>~ /trunk/examples/pci_lpc/pci_lpc.ise<br />~ /trunk/examples/pci_lpc/pci_lpc.ucf<br />~ /trunk/examples/pci_lpc/pci_lpc_host.bit<br />~ /trunk/examples/pci_lpc/top_pci_lpc_host.v<br /> hharte Mon, 10 Mar 2008 14:17:13 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=12 Add Serial IRQ Support https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=11 <div><strong>Rev 11 - hharte</strong> (4 file(s) modified)</div><div>Add Serial IRQ Support</div>+ /trunk/rtl/verilog/serirq_defines.v<br />+ /trunk/rtl/verilog/serirq_host.v<br />+ /trunk/rtl/verilog/serirq_slave.v<br />~ /trunk/rtl/verilog/wb_lpc_defines.v<br /> hharte Mon, 10 Mar 2008 14:08:13 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=11 Added Serial IRQ information. https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=10 <div><strong>Rev 10 - hharte</strong> (1 file(s) modified)</div><div>Added Serial IRQ information.</div>~ /trunk/doc/wb_lpc.pdf<br /> hharte Mon, 10 Mar 2008 14:03:02 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=10 Add example projects for PCI LPC Host and LPC 7-Segment ... https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=9 <div><strong>Rev 9 - hharte</strong> (4 file(s) modified)</div><div>Add example projects for PCI LPC Host and LPC 7-Segment ...</div>~ /trunk/examples/pci_lpc/pci_lpc.ise<br />~ /trunk/examples/pci_lpc/pci_lpc.ucf<br />~ /trunk/examples/pci_lpc/pci_lpc_host.bit<br />~ /trunk/examples/pci_lpc/top_pci_lpc_host.v<br /> hharte Wed, 05 Mar 2008 16:14:32 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=9 Added some details on LPC cycle type definitions, fixed some ... https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=8 <div><strong>Rev 8 - hharte</strong> (1 file(s) modified)</div><div>Added some details on LPC cycle type definitions, fixed some ...</div>~ /trunk/doc/wb_lpc.pdf<br /> hharte Wed, 05 Mar 2008 15:47:27 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=8 Add example projects for PCI LPC Host and LPC 7-Segment ... https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=7 <div><strong>Rev 7 - hharte</strong> (14 file(s) modified)</div><div>Add example projects for PCI LPC Host and LPC 7-Segment ...</div>+ /trunk/examples<br />+ /trunk/examples/lpc_7seg<br />+ /trunk/examples/lpc_7seg/disp_dec.vhd<br />+ /trunk/examples/lpc_7seg/lpc_7seg.bit<br />+ /trunk/examples/lpc_7seg/lpc_7seg.ise<br />+ /trunk/examples/lpc_7seg/lpc_7seg.ucf<br />+ /trunk/examples/lpc_7seg/top_lpc_7seg.v<br />+ /trunk/examples/lpc_7seg/wb_7seg.vhd<br />+ /trunk/examples/pci_lpc<br />+ /trunk/examples/pci_lpc/pci_lpc.ise<br />+ /trunk/examples/pci_lpc/pci_lpc.ucf<br />+ /trunk/examples/pci_lpc/pci_lpc_host.bit<br />+ /trunk/examples/pci_lpc/top_pci_lpc_host.v<br />+ /trunk/examples/README.TXT<br /> hharte Wed, 05 Mar 2008 05:58:41 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=7 Clean up whitespace. https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=6 <div><strong>Rev 6 - hharte</strong> (5 file(s) modified)</div><div>Clean up whitespace.</div>~ /trunk/rtl/verilog/wb_dreq_host.v<br />~ /trunk/rtl/verilog/wb_dreq_periph.v<br />~ /trunk/rtl/verilog/wb_lpc_periph.v<br />~ /trunk/rtl/verilog/wb_regfile.v<br />~ /trunk/sim/wb_lpc_sim/wb_lpc_sim.ise<br /> hharte Wed, 05 Mar 2008 05:51:00 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=6 Fix bug in LPC Host that was causing a 2nd ... https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=5 <div><strong>Rev 5 - hharte</strong> (2 file(s) modified)</div><div>Fix bug in LPC Host that was causing a 2nd ...</div>~ /trunk/rtl/verilog/wb_lpc_defines.v<br />~ /trunk/rtl/verilog/wb_lpc_host.v<br /> hharte Wed, 05 Mar 2008 05:50:25 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=5 Adding .cvsignore files to ignore .svn directories. https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=4 <div><strong>Rev 4 - hharte</strong> (7 file(s) modified)</div><div>Adding .cvsignore files to ignore .svn directories.</div>~ /trunk<br />~ /trunk/doc<br />+ /trunk/doc/src<br />~ /trunk/rtl<br />~ /trunk/rtl/verilog<br />~ /trunk/sim<br />~ /trunk/sim/wb_lpc_sim<br /> hharte Mon, 03 Mar 2008 03:00:40 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=4 Initial checkin of source files https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=3 <div><strong>Rev 3 - hharte</strong> (12 file(s) modified)</div><div>Initial checkin of source files</div>+ /trunk/rtl<br />+ /trunk/rtl/verilog<br />+ /trunk/rtl/verilog/wb_dreq_host.v<br />+ /trunk/rtl/verilog/wb_dreq_periph.v<br />+ /trunk/rtl/verilog/wb_lpc_defines.v<br />+ /trunk/rtl/verilog/wb_lpc_host.v<br />+ /trunk/rtl/verilog/wb_lpc_periph.v<br />+ /trunk/rtl/verilog/wb_regfile.v<br />+ /trunk/sim<br />+ /trunk/sim/wb_lpc_sim<br />+ /trunk/sim/wb_lpc_sim/tb_lpc_top.v<br />+ /trunk/sim/wb_lpc_sim/wb_lpc_sim.ise<br /> hharte Sun, 02 Mar 2008 20:46:41 +0100 https://opencores.org/websvn//websvn/revision?repname=wb_lpc&path=%2F&rev=3
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