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z80soc WebSVN RSS feed - z80soc https://opencores.org/websvn//websvn/listing?repname=z80soc&path=%2Fz80soc%2Fbranches%2F& Thu, 16 Jul 2020 18:26:21 +0100 FeedCreator 1.7.2 New directory structure. https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fz80soc%2Fbranches%2F&rev=31 <div><strong>Rev 31 - root</strong> (8 file(s) modified)</div><div>New directory structure.</div>- /branches<br />- /tags<br />- /trunk<br />+ /z80soc<br />+ /z80soc/branches<br />+ /z80soc/tags<br />+ /z80soc/trunk<br />+ /z80soc/web_uploads<br /> root Tue, 10 Mar 2009 10:52:53 +0100 https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fz80soc%2Fbranches%2F&rev=31 no message https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=18 <div><strong>Rev 18 - rrred</strong> (38 file(s) modified)</div><div>no message</div>+ /branches/RonivonCosta/doc/README-DE1.txt<br />~ /branches/RonivonCosta/doc/README-S3E.txt<br />~ /branches/RonivonCosta/doc/RevisionHistory.txt<br />~ /branches/RonivonCosta/S3E/char.vhd<br />~ /branches/RonivonCosta/S3E/ps2bkd.vhd<br />~ /branches/RonivonCosta/S3E/rom.vhd<br />+ /branches/RonivonCosta/S3E/rom/SoC_PS2.z8a<br />+ /branches/RonivonCosta/S3E/sram16k.ngc<br />+ /branches/RonivonCosta/S3E/sram16k.vhd<br />~ /branches/RonivonCosta/S3E/T80se.vhd<br />~ /branches/RonivonCosta/S3E/T80_ALU.vhd<br />~ /branches/RonivonCosta/S3E/T80_MCode.vhd<br />~ /branches/RonivonCosta/S3E/T80_Pack.vhd<br />+ /branches/RonivonCosta/S3E/T80_RegX.vhd<br />~ /branches/RonivonCosta/S3E/top_s3e.vhd<br />~ /branches/RonivonCosta/S3E/vga_sync.vhd<br />+ /branches/RonivonCosta/S3E/video.vhd<br />~ /branches/RonivonCosta/S3E/z80soc.ise<br />+ /branches/RonivonCosta/S3E/Z80SOC_TOP_guide.ncd<br />~ /trunk/doc/README-S3E.txt<br />- /trunk/doc/README.txt<br />~ /trunk/doc/RevisionHistory.txt<br />~ /trunk/S3E/char.vhd<br />- /trunk/S3E/decoder_7seg.vhd<br />~ /trunk/S3E/ps2bkd.vhd<br />- /trunk/S3E/rom<br />~ /trunk/S3E/rom.vhd<br />- /trunk/S3E/sram.ngc<br />- /trunk/S3E/T80s.vhd<br />~ /trunk/S3E/T80se.vhd<br />~ /trunk/S3E/T80_ALU.vhd<br />~ /trunk/S3E/T80_MCode.vhd<br />~ /trunk/S3E/T80_Pack.vhd<br />- /trunk/S3E/T80_Reg.vhd<br />~ /trunk/S3E/top_s3e.vhd<br />~ /trunk/S3E/vga_sync.vhd<br />- /trunk/S3E/VIDEO_80X40.vhd<br />~ /trunk/S3E/z80soc.ise<br /> rrred Sun, 11 May 2008 12:16:02 +0100 https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=18 no message https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=15 <div><strong>Rev 15 - rrred</strong> (1 file(s) modified)</div><div>no message</div>+ /branches/RonivonCosta/READ_THIS_FIRST.TXT<br /> rrred Wed, 07 May 2008 15:23:04 +0100 https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=15 no message https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=14 <div><strong>Rev 14 - rrred</strong> (1 file(s) modified)</div><div>no message</div>~ /branches/RonivonCosta/doc/README-S3E.txt<br /> rrred Wed, 07 May 2008 14:42:48 +0100 https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=14 Spartan 3E Release https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=11 <div><strong>Rev 11 - rrred</strong> (82 file(s) modified)</div><div>Spartan 3E Release</div>+ /branches/RonivonCosta/DE1<br />+ /branches/RonivonCosta/DE1/ROM<br />+ /branches/RonivonCosta/DE1/ROM/CHARROM.MIF<br />+ /branches/RonivonCosta/DE1/ROM/convrom.sh<br />+ /branches/RonivonCosta/DE1/ROM/drdos8x8.txt<br />+ /branches/RonivonCosta/DE1/ROM/hex2rom.sh<br />+ /branches/RonivonCosta/DE1/ROM/mif2coe.sh<br />+ /branches/RonivonCosta/DE1/ROM/psf2mif.sh<br />+ /branches/RonivonCosta/DE1/ROM/rom.hex<br />+ /branches/RonivonCosta/DE1/ROM/rom.vhd<br />+ /branches/RonivonCosta/DE1/ROM/SoC_PS2.z8a<br />+ /branches/RonivonCosta/DE1/ROM/z80asm.exe<br />+ /branches/RonivonCosta/DE1/ROM/z802rom.sh<br />+ /branches/RonivonCosta/DE1/rtl<br />+ /branches/RonivonCosta/DE1/rtl/VHDL<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/CHAR_ROM.VHD<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/clk_div.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/clock_357mhz.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/decoder_7seg.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/PS2<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/PS2/KEYBOARD.VHD<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/PS2/ps2bkd.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/PS2/ps2bkd.vhd.bak<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/rom.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/DebugSystem.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/DebugSystemXR.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/SSRAM.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/SSRAM2.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/SSRAMX.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/T80.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/T80a.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/T80s.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/T80s.vhd.bak<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/T80se.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/T80_ALU.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/T80_MCode.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/T80_Pack.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/T80_Reg.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/T80_RegX.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/T8080se.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/t80/T16450.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/top_de1.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/vga_sync.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/VIDEO_80X40.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/video_PLL.vhd<br />+ /branches/RonivonCosta/DE1/rtl/VHDL/vram8k.vhd<br />+ /branches/RonivonCosta/DE1/z80soc.qpf<br />+ /branches/RonivonCosta/DE1/z80soc.qsf<br />+ /branches/RonivonCosta/doc/README-S3E.txt<br />~ /branches/RonivonCosta/doc/README.txt<br />~ /branches/RonivonCosta/doc/RevisionHistory.txt<br />+ /branches/RonivonCosta/S3E<br />+ /branches/RonivonCosta/S3E/char.vhd<br />+ /branches/RonivonCosta/S3E/charrom.vhd<br />+ /branches/RonivonCosta/S3E/clk_div.vhd<br />+ /branches/RonivonCosta/S3E/clock_357mhz.vhd<br />+ /branches/RonivonCosta/S3E/decoder_7seg.vhd<br />+ /branches/RonivonCosta/S3E/KEYBOARD.VHD<br />+ /branches/RonivonCosta/S3E/lcd.vhd<br />+ /branches/RonivonCosta/S3E/lcdvram.ngc<br />+ /branches/RonivonCosta/S3E/lcdvram.vhd<br />+ /branches/RonivonCosta/S3E/ps2bkd.vhd<br />+ /branches/RonivonCosta/S3E/rom<br />+ /branches/RonivonCosta/S3E/rom.vhd<br />+ /branches/RonivonCosta/S3E/rom/lcd_demo2.z8a<br />+ /branches/RonivonCosta/S3E/sram.ngc<br />+ /branches/RonivonCosta/S3E/T80.vhd<br />+ /branches/RonivonCosta/S3E/T80s.vhd<br />+ /branches/RonivonCosta/S3E/T80se.vhd<br />+ /branches/RonivonCosta/S3E/T80sed.vhd<br />+ /branches/RonivonCosta/S3E/T80_ALU.vhd<br />+ /branches/RonivonCosta/S3E/T80_MCode.vhd<br />+ /branches/RonivonCosta/S3E/T80_Pack.vhd<br />+ /branches/RonivonCosta/S3E/T80_Reg.vhd<br />+ /branches/RonivonCosta/S3E/top_s3e.vhd<br />+ /branches/RonivonCosta/S3E/vga_sync.vhd<br />+ /branches/RonivonCosta/S3E/VIDEO_80X40.vhd<br />+ /branches/RonivonCosta/S3E/vram.ngc<br />+ /branches/RonivonCosta/S3E/vram.vhd<br />+ /branches/RonivonCosta/S3E/z80soc.ise<br />+ /branches/RonivonCosta/S3E/z80soc.ucf<br /> rrred Sun, 04 May 2008 20:57:33 +0100 https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=11 Addedd caps lock support for keyboard. https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=9 <div><strong>Rev 9 - rrred</strong> (12 file(s) modified)</div><div>Addedd caps lock support for keyboard.</div>~ /branches/RonivonCosta/doc/README.txt<br />~ /branches/RonivonCosta/doc/RevisionHistory.txt<br />+ /branches/RonivonCosta/ROM/drdos8x8.txt<br />+ /branches/RonivonCosta/ROM/hex2rom.sh<br />+ /branches/RonivonCosta/ROM/mif2coe.sh<br />+ /branches/RonivonCosta/ROM/psf2mif.sh<br />+ /branches/RonivonCosta/ROM/z802rom.sh<br />+ /branches/RonivonCosta/rtl/VHDL/clk_div.vhd<br />~ /branches/RonivonCosta/rtl/VHDL/PS2/ps2bkd.vhd<br />~ /branches/RonivonCosta/rtl/VHDL/top_de1.vhd<br />+ /branches/RonivonCosta/z80soc.qpf<br />+ /branches/RonivonCosta/z80soc.qsf<br /> rrred Fri, 02 May 2008 09:36:27 +0100 https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=9 ROM bug fixed. https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=6 <div><strong>Rev 6 - rrred</strong> (6 file(s) modified)</div><div>ROM bug fixed.</div>~ /branches/RonivonCosta/ROM/rom.hex<br />~ /branches/RonivonCosta/ROM/rom.vhd<br />~ /branches/RonivonCosta/ROM/SoC_PS2.z8a<br />~ /branches/RonivonCosta/rtl/VHDL/PS2/ps2bkd.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/PS2/ps2bkd.vhd.bak<br />~ /branches/RonivonCosta/rtl/VHDL/rom.vhd<br /> rrred Sat, 19 Apr 2008 12:46:08 +0100 https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=6 no message https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=4 <div><strong>Rev 4 - rrred</strong> (9 file(s) modified)</div><div>no message</div>+ /branches/RonivonCosta/doc/RevisionHistory.txt<br />+ /branches/RonivonCosta/ROM/CHARROM.MIF<br />~ /branches/RonivonCosta/ROM/rom.hex<br />~ /branches/RonivonCosta/ROM/rom.vhd<br />~ /branches/RonivonCosta/ROM/SoC_PS2.z8a<br />~ /branches/RonivonCosta/rtl/VHDL/CHAR_ROM.VHD<br />~ /branches/RonivonCosta/rtl/VHDL/rom.vhd<br />~ /branches/RonivonCosta/rtl/VHDL/top_de1.vhd<br />~ /branches/RonivonCosta/rtl/VHDL/VIDEO_80X40.vhd<br /> rrred Sat, 19 Apr 2008 09:52:43 +0100 https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=4 no message https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=2 <div><strong>Rev 2 - rrred</strong> (45 file(s) modified)</div><div>no message</div>+ /branches/RonivonCosta<br />+ /branches/RonivonCosta/doc<br />+ /branches/RonivonCosta/doc/DISCALIMER.TXT<br />+ /branches/RonivonCosta/doc/README.txt<br />+ /branches/RonivonCosta/ROM<br />+ /branches/RonivonCosta/ROM/convrom.sh<br />+ /branches/RonivonCosta/ROM/rom.hex<br />+ /branches/RonivonCosta/ROM/rom.vhd<br />+ /branches/RonivonCosta/ROM/SoC_PS2.z8a<br />+ /branches/RonivonCosta/ROM/TCGROM.MIF<br />+ /branches/RonivonCosta/ROM/z80asm.exe<br />+ /branches/RonivonCosta/rtl<br />+ /branches/RonivonCosta/rtl/VHDL<br />+ /branches/RonivonCosta/rtl/VHDL/CHAR_ROM.VHD<br />+ /branches/RonivonCosta/rtl/VHDL/clock_357mhz.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/decoder_7seg.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/PS2<br />+ /branches/RonivonCosta/rtl/VHDL/PS2/KEYBOARD.VHD<br />+ /branches/RonivonCosta/rtl/VHDL/PS2/ps2bkd.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/rom.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80<br />+ /branches/RonivonCosta/rtl/VHDL/t80/DebugSystem.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/DebugSystemXR.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/SSRAM.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/SSRAM2.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/SSRAMX.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/T80.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/T80a.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/T80s.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/T80s.vhd.bak<br />+ /branches/RonivonCosta/rtl/VHDL/t80/T80se.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/T80_ALU.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/T80_MCode.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/T80_Pack.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/T80_Reg.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/T80_RegX.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/T8080se.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/t80/T16450.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/top_de1.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/vga_sync.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/VIDEO_80X40.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/video_PLL.vhd<br />+ /branches/RonivonCosta/rtl/VHDL/vram8k.vhd<br />+ /branches/RonivonCosta/Z80Computer_DE1.qpf<br />+ /branches/RonivonCosta/z80cpu.qsf<br /> rrred Wed, 16 Apr 2008 14:20:23 +0100 https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=2 Standard project directories initialized by cvs2svn. https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=1 <div><strong>Rev 1 - </strong> (3 file(s) modified)</div><div>Standard project directories initialized by cvs2svn.</div>+ /branches<br />+ /tags<br />+ /trunk<br /> Wed, 16 Apr 2008 14:20:23 +0100 https://opencores.org/websvn//websvn/revision?repname=z80soc&path=%2Fbranches%2F&rev=1
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