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zipcpu WebSVN RSS feed - zipcpu https://opencores.org/websvn//websvn/listing?repname=zipcpu&path=%2Fzipcpu%2F& Mon, 08 Aug 2022 23:01:46 +0100 FeedCreator 1.7.2 Noted 64-bit integers are by extension, as are vector instructions. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=162 <div><strong>Rev 162 - dgisselq</strong> (1 file(s) modified)</div><div>Noted 64-bit integers are by extension, as are vector instructions.</div>~ /zipcpu/trunk/doc/orconf.pdf<br /> dgisselq Thu, 30 Jun 2016 11:58:27 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=162 Initial version of the ORConf slides, showing only the initial ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=161 <div><strong>Rev 161 - dgisselq</strong> (1 file(s) modified)</div><div>Initial version of the ORConf slides, showing only the initial ...</div>+ /zipcpu/trunk/doc/orconf.pdf<br /> dgisselq Thu, 30 Jun 2016 11:50:03 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=161 Logic updates, and bug fix corrections to bring this in ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=160 <div><strong>Rev 160 - dgisselq</strong> (8 file(s) modified)</div><div>Logic updates, and bug fix corrections to bring this in ...</div>~ /zipcpu/trunk/rtl/core/div.v<br />~ /zipcpu/trunk/rtl/core/idecode.v<br />~ /zipcpu/trunk/rtl/core/pipemem.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/peripherals/wbdmac.v<br />~ /zipcpu/trunk/rtl/peripherals/zipcounter.v<br />~ /zipcpu/trunk/rtl/peripherals/zipjiffies.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br /> dgisselq Wed, 15 Jun 2016 00:28:39 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=160 Now supports building a simulator that can load ELF files, ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=159 <div><strong>Rev 159 - dgisselq</strong> (1 file(s) modified)</div><div>Now supports building a simulator that can load ELF files, ...</div>~ /zipcpu/trunk/bench/cpp/Makefile<br /> dgisselq Wed, 15 Jun 2016 00:27:23 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=159 Now automatically builds the toolchain by default. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=158 <div><strong>Rev 158 - dgisselq</strong> (1 file(s) modified)</div><div>Now automatically builds the toolchain by default.</div>~ /zipcpu/trunk/Makefile<br /> dgisselq Wed, 15 Jun 2016 00:23:21 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=158 Added the divide unit to the list of ZipCPU dependencies. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=157 <div><strong>Rev 157 - dgisselq</strong> (1 file(s) modified)</div><div>Added the divide unit to the list of ZipCPU dependencies.</div>~ /zipcpu/trunk/rtl/Makefile<br /> dgisselq Wed, 15 Jun 2016 00:22:25 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=157 Fixed a compiler warning for an unused result. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=156 <div><strong>Rev 156 - dgisselq</strong> (1 file(s) modified)</div><div>Fixed a compiler warning for an unused result.</div>~ /zipcpu/trunk/sw/zasm/twoc.cpp<br /> dgisselq Wed, 15 Jun 2016 00:20:12 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=156 Improved debug trace quality, for finding bugs after the fact. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=155 <div><strong>Rev 155 - dgisselq</strong> (1 file(s) modified)</div><div>Improved debug trace quality, for finding bugs after the fact.</div>~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br /> dgisselq Wed, 15 Jun 2016 00:19:12 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=155 Added timing checks on the busy and valid signals: either ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=154 <div><strong>Rev 154 - dgisselq</strong> (1 file(s) modified)</div><div>Added timing checks on the busy and valid signals: either ...</div>~ /zipcpu/trunk/bench/cpp/div_tb.cpp<br /> dgisselq Wed, 15 Jun 2016 00:17:14 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=154 Adds internal link functionality to the specification document format. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=153 <div><strong>Rev 153 - dgisselq</strong> (1 file(s) modified)</div><div>Adds internal link functionality to the specification document format.</div>~ /zipcpu/trunk/doc/src/gqtekspec.cls<br /> dgisselq Wed, 15 Jun 2016 00:15:44 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=153 Updated to match the new/updated multiply instructions. Of course, ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=152 <div><strong>Rev 152 - dgisselq</strong> (1 file(s) modified)</div><div>Updated to match the new/updated multiply instructions. Of course, ...</div>~ /zipcpu/trunk/bench/asm/zipdhry.S<br /> dgisselq Fri, 13 May 2016 02:05:54 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=152 Minor formatting change. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=151 <div><strong>Rev 151 - dgisselq</strong> (1 file(s) modified)</div><div>Minor formatting change.</div>~ /zipcpu/trunk/bench/asm/lfsr.S<br /> dgisselq Fri, 13 May 2016 02:01:55 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=151 Minor changes. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=150 <div><strong>Rev 150 - dgisselq</strong> (2 file(s) modified)</div><div>Minor changes.</div>~ /zipcpu/trunk/bench/asm/helloworld.S<br />~ /zipcpu/trunk/bench/asm/lodsto.S<br /> dgisselq Fri, 13 May 2016 02:00:56 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=150 Updated the Makefile documentation and the all target. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=149 <div><strong>Rev 149 - dgisselq</strong> (1 file(s) modified)</div><div>Updated the Makefile documentation and the all target.</div>~ /zipcpu/trunk/bench/cpp/Makefile<br /> dgisselq Fri, 13 May 2016 01:56:01 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=149 Minor changes to get LONG_MPY working, and adjust the documentation. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=148 <div><strong>Rev 148 - dgisselq</strong> (1 file(s) modified)</div><div>Minor changes to get LONG_MPY working, and adjust the documentation.</div>~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br /> dgisselq Fri, 13 May 2016 01:55:23 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=148 Cleans up div_tb a bit, causing it to write SUCCESS ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=147 <div><strong>Rev 147 - dgisselq</strong> (1 file(s) modified)</div><div>Cleans up div_tb a bit, causing it to write SUCCESS ...</div>~ /zipcpu/trunk/bench/cpp/div_tb.cpp<br /> dgisselq Fri, 13 May 2016 01:54:06 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=147 Fixes a problem where the assembler complained the compiler was ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=146 <div><strong>Rev 146 - dgisselq</strong> (2 file(s) modified)</div><div>Fixes a problem where the assembler complained the compiler was ...</div>~ /zipcpu/trunk/sw/binutils-2.25.patch<br />~ /zipcpu/trunk/sw/gcc-zippatch.patch<br /> dgisselq Fri, 13 May 2016 01:51:01 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=146 This fixes the pipelined memory problem that was introduced a ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=145 <div><strong>Rev 145 - dgisselq</strong> (1 file(s) modified)</div><div>This fixes the pipelined memory problem that was introduced a ...</div>~ /zipcpu/trunk/rtl/core/zipcpu.v<br /> dgisselq Fri, 13 May 2016 01:42:59 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=145 Makes the auto-reload capability a configuration option, and fills out ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=144 <div><strong>Rev 144 - dgisselq</strong> (1 file(s) modified)</div><div>Makes the auto-reload capability a configuration option, and fills out ...</div>~ /zipcpu/trunk/rtl/peripherals/ziptimer.v<br /> dgisselq Fri, 13 May 2016 01:32:46 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=144 This section belatedly adjusts the zasm assembler so that it ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=143 <div><strong>Rev 143 - dgisselq</strong> (4 file(s) modified)</div><div>This section belatedly adjusts the zasm assembler so that it ...</div>~ /zipcpu/trunk/sw/zasm/asmdata.cpp<br />~ /zipcpu/trunk/sw/zasm/test.S<br />~ /zipcpu/trunk/sw/zasm/zparser.cpp<br />~ /zipcpu/trunk/sw/zasm/zparser.h<br /> dgisselq Fri, 13 May 2016 01:26:16 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=143
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