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zipcpu WebSVN RSS feed - zipcpu https://opencores.org/websvn//websvn/listing?repname=zipcpu&path=%2Fzipcpu%2F& Sun, 15 Mar 2026 08:32:58 +0100 FeedCreator 1.7.2 Some updated graphics, now containing images of the CPU that ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=72 <div><strong>Rev 72 - dgisselq</strong> (4 file(s) modified)</div><div>Some updated graphics, now containing images of the CPU that ...</div>~ /zipcpu/trunk/doc/gfx/cpu.png<br />~ /zipcpu/trunk/doc/gfx/regset.png<br />~ /zipcpu/trunk/doc/gfx/system.png<br />~ /zipcpu/trunk/doc/gfx/zipbones.png<br /> dgisselq Mon, 28 Dec 2015 20:38:13 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=72 This contains a bunch of bug fixes. (A lot ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=71 <div><strong>Rev 71 - dgisselq</strong> (7 file(s) modified)</div><div>This contains a bunch of bug fixes. (A lot ...</div>~ /zipcpu/trunk/rtl/core/cpuops.v<br />~ /zipcpu/trunk/rtl/core/idecode.v<br />~ /zipcpu/trunk/rtl/core/idecode_deprecated.v<br />~ /zipcpu/trunk/rtl/core/pfcache.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/cpudefs.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br /> dgisselq Mon, 28 Dec 2015 20:34:13 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=71 Updated the assembler support files, zopcodes in particular, to handle ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=70 <div><strong>Rev 70 - dgisselq</strong> (4 file(s) modified)</div><div>Updated the assembler support files, zopcodes in particular, to handle ...</div>~ /zipcpu/trunk/sw/zasm/optest.cpp<br />~ /zipcpu/trunk/sw/zasm/zdump.cpp<br />~ /zipcpu/trunk/sw/zasm/zopcodes.cpp<br />~ /zipcpu/trunk/sw/zasm/zopcodes.h<br /> dgisselq Mon, 28 Dec 2015 20:22:27 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=70 This implements the "new Instruction Set" architecture for the Zip ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=69 <div><strong>Rev 69 - dgisselq</strong> (85 file(s) modified)</div><div>This implements the "new Instruction Set" architecture for the Zip ...</div>~ /zipcpu/trunk/bench/asm/helloworld.S<br />~ /zipcpu/trunk/bench/asm/ivec.S<br />~ /zipcpu/trunk/bench/asm/lodsto.S<br />~ /zipcpu/trunk/bench/asm/Makefile<br />~ /zipcpu/trunk/bench/asm/pcpc.S<br />~ /zipcpu/trunk/bench/asm/testdiv.S<br />~ /zipcpu/trunk/bench/asm/wdt.S<br />~ /zipcpu/trunk/bench/asm/zipdhry.S<br />~ /zipcpu/trunk/bench/cpp/Makefile<br />~ /zipcpu/trunk/bench/cpp/memsim.cpp<br />~ /zipcpu/trunk/bench/cpp/memsim.h<br />~ /zipcpu/trunk/bench/cpp/pdump.cpp<br />~ /zipcpu/trunk/bench/cpp/testb.h<br />~ /zipcpu/trunk/bench/cpp/twoc.cpp<br />~ /zipcpu/trunk/bench/cpp/twoc.h<br />~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />~ /zipcpu/trunk/doc/gfx/bc.eps<br />~ /zipcpu/trunk/doc/gfx/bra.eps<br />~ /zipcpu/trunk/doc/gfx/cpu.dia<br />~ /zipcpu/trunk/doc/gfx/cpu.eps<br />~ /zipcpu/trunk/doc/gfx/cpu.png<br />~ /zipcpu/trunk/doc/gfx/memrd.eps<br />~ /zipcpu/trunk/doc/gfx/memwr.eps<br />~ /zipcpu/trunk/doc/gfx/regset.png<br />~ /zipcpu/trunk/doc/gfx/system.dia<br />~ /zipcpu/trunk/doc/gfx/system.eps<br />~ /zipcpu/trunk/doc/gfx/system.png<br />~ /zipcpu/trunk/doc/gfx/zipbones.dia<br />~ /zipcpu/trunk/doc/gfx/zipbones.png<br />~ /zipcpu/trunk/doc/iset.html<br />~ /zipcpu/trunk/doc/Makefile<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />~ /zipcpu/trunk/Makefile<br />~ /zipcpu/trunk/rtl/aux/busdelay.v<br />~ /zipcpu/trunk/rtl/aux/wbarbiter.v<br />~ /zipcpu/trunk/rtl/aux/wbdblpriarb.v<br />~ /zipcpu/trunk/rtl/aux/wbpriarbiter.v<br />~ /zipcpu/trunk/rtl/core/cpuops.v<br />+ /zipcpu/trunk/rtl/core/cpuops_deprecated.v<br />+ /zipcpu/trunk/rtl/core/div.v<br />+ /zipcpu/trunk/rtl/core/idecode.v<br />+ /zipcpu/trunk/rtl/core/idecode_deprecated.v<br />~ /zipcpu/trunk/rtl/core/memops.v<br />+ /zipcpu/trunk/rtl/core/pfcache.v<br />~ /zipcpu/trunk/rtl/core/pipefetch.v<br />~ /zipcpu/trunk/rtl/core/pipemem.v<br />~ /zipcpu/trunk/rtl/core/prefetch.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/cpudefs.v<br />~ /zipcpu/trunk/rtl/Makefile<br />~ /zipcpu/trunk/rtl/peripherals/flashcache.v<br />~ /zipcpu/trunk/rtl/peripherals/icontrol.v<br />~ /zipcpu/trunk/rtl/peripherals/wbdmac.v<br />+ /zipcpu/trunk/rtl/peripherals/wbwatchdog.v<br />~ /zipcpu/trunk/rtl/peripherals/zipcounter.v<br />~ /zipcpu/trunk/rtl/peripherals/zipjiffies.v<br />~ /zipcpu/trunk/rtl/peripherals/ziptimer.v<br />~ /zipcpu/trunk/rtl/peripherals/ziptrap.v<br />~ /zipcpu/trunk/rtl/zipbones.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />~ /zipcpu/trunk/sw/lib/divs.S<br />~ /zipcpu/trunk/sw/lib/divu.S<br />~ /zipcpu/trunk/sw/lib/mpy32s.S<br />~ /zipcpu/trunk/sw/lib/mpy32u.S<br />~ /zipcpu/trunk/sw/zasm/asmdata.cpp<br />~ /zipcpu/trunk/sw/zasm/asmdata.h<br />~ /zipcpu/trunk/sw/zasm/Makefile<br />~ /zipcpu/trunk/sw/zasm/optest.cpp<br />~ /zipcpu/trunk/sw/zasm/sys.i<br />~ /zipcpu/trunk/sw/zasm/test.S<br />~ /zipcpu/trunk/sw/zasm/twoc.cpp<br />~ /zipcpu/trunk/sw/zasm/twoc.h<br />~ /zipcpu/trunk/sw/zasm/zasm.l<br />~ /zipcpu/trunk/sw/zasm/zasm.y<br />~ /zipcpu/trunk/sw/zasm/zdump.cpp<br />~ /zipcpu/trunk/sw/zasm/zopcodes.cpp<br />~ /zipcpu/trunk/sw/zasm/zopcodes.h<br />~ /zipcpu/trunk/sw/zasm/zparser.cpp<br />~ /zipcpu/trunk/sw/zasm/zparser.h<br />~ /zipcpu/trunk/sw/zasm/zpp.l<br />~ /zipcpu/trunk/sw/zipdbg/devbus.h<br />~ /zipcpu/trunk/sw/zipdbg/regdefs.h<br />~ /zipcpu/trunk/sw/zipdbg/zipdbg.cpp<br />+ /zipcpu/trunk/zip.vim<br /> dgisselq Tue, 22 Dec 2015 16:06:51 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=69 Updated specification, includes well illustrated pipeline discussion. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=68 <div><strong>Rev 68 - dgisselq</strong> (3 file(s) modified)</div><div>Updated specification, includes well illustrated pipeline discussion.</div>~ /zipcpu/trunk/doc/Makefile<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br /> dgisselq Tue, 17 Nov 2015 15:44:50 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=68 Includes timing diagrams in support of a very descriptive specification ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=67 <div><strong>Rev 67 - dgisselq</strong> (17 file(s) modified)</div><div>Includes timing diagrams in support of a very descriptive specification ...</div>+ /zipcpu/trunk/doc/gfx/bc.eps<br />+ /zipcpu/trunk/doc/gfx/bcmem.eps<br />+ /zipcpu/trunk/doc/gfx/bdbroken.eps<br />+ /zipcpu/trunk/doc/gfx/bdly.eps<br />+ /zipcpu/trunk/doc/gfx/bra.eps<br />~ /zipcpu/trunk/doc/gfx/cpu.dia<br />~ /zipcpu/trunk/doc/gfx/cpu.eps<br />+ /zipcpu/trunk/doc/gfx/fullpline.eps<br />+ /zipcpu/trunk/doc/gfx/memrd.eps<br />+ /zipcpu/trunk/doc/gfx/memwr.eps<br />+ /zipcpu/trunk/doc/gfx/sleep.eps<br />+ /zipcpu/trunk/doc/gfx/stacking.eps<br />+ /zipcpu/trunk/doc/gfx/stuttra.eps<br />+ /zipcpu/trunk/doc/gfx/stuttrb.eps<br />~ /zipcpu/trunk/doc/gfx/system.dia<br />~ /zipcpu/trunk/doc/gfx/system.eps<br />~ /zipcpu/trunk/doc/gfx/zipbones.dia<br /> dgisselq Tue, 17 Nov 2015 15:39:39 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=67 Adjusted the support for the DEBUG_SCOPE within these so that ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=66 <div><strong>Rev 66 - dgisselq</strong> (2 file(s) modified)</div><div>Adjusted the support for the DEBUG_SCOPE within these so that ...</div>~ /zipcpu/trunk/rtl/zipbones.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br /> dgisselq Thu, 22 Oct 2015 16:01:50 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=66 Lots of logic simplifications to the core, in addition to ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=65 <div><strong>Rev 65 - dgisselq</strong> (1 file(s) modified)</div><div>Lots of logic simplifications to the core, in addition to ...</div>~ /zipcpu/trunk/rtl/core/zipcpu.v<br /> dgisselq Thu, 22 Oct 2015 15:59:30 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=65 Shuffled some comments into here from elsewhere. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=64 <div><strong>Rev 64 - dgisselq</strong> (1 file(s) modified)</div><div>Shuffled some comments into here from elsewhere.</div>~ /zipcpu/trunk/rtl/cpudefs.v<br /> dgisselq Thu, 22 Oct 2015 15:54:42 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=64 Simplified bus interactions, and added support for detecting illegal instructions (i.e. ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=63 <div><strong>Rev 63 - dgisselq</strong> (3 file(s) modified)</div><div>Simplified bus interactions, and added support for detecting illegal<br /> instructions (i.e. ...</div>~ /zipcpu/trunk/rtl/core/pipefetch.v<br />~ /zipcpu/trunk/rtl/core/pipemem.v<br />~ /zipcpu/trunk/rtl/core/prefetch.v<br /> dgisselq Thu, 22 Oct 2015 15:51:42 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=63 Simplified the subtraction logic, so the carry bit no longer ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=62 <div><strong>Rev 62 - dgisselq</strong> (1 file(s) modified)</div><div>Simplified the subtraction logic, so the carry bit no longer ...</div>~ /zipcpu/trunk/rtl/core/cpuops.v<br /> dgisselq Thu, 22 Oct 2015 15:48:08 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=62 Simplified the bus delay logic. Depends upon the stall ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=61 <div><strong>Rev 61 - dgisselq</strong> (1 file(s) modified)</div><div>Simplified the bus delay logic. Depends upon the stall ...</div>~ /zipcpu/trunk/rtl/aux/busdelay.v<br /> dgisselq Thu, 22 Oct 2015 15:45:25 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=61 Fixed assembler processing of jump instructions, so that the new ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=60 <div><strong>Rev 60 - dgisselq</strong> (3 file(s) modified)</div><div>Fixed assembler processing of jump instructions, so that the new ...</div>~ /zipcpu/trunk/sw/zasm/asmdata.cpp<br />~ /zipcpu/trunk/sw/zasm/sys.i<br />~ /zipcpu/trunk/sw/zasm/test.S<br /> dgisselq Thu, 22 Oct 2015 15:41:00 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=60 Adjusted these library routines to use the new stack frame ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=59 <div><strong>Rev 59 - dgisselq</strong> (4 file(s) modified)</div><div>Adjusted these library routines to use the new stack frame ...</div>~ /zipcpu/trunk/sw/lib/divs.S<br />~ /zipcpu/trunk/sw/lib/divu.S<br />~ /zipcpu/trunk/sw/lib/mpy32s.S<br />~ /zipcpu/trunk/sw/lib/mpy32u.S<br /> dgisselq Thu, 22 Oct 2015 15:38:06 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=59 Added a rudimentary profiling support to the simulator. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=58 <div><strong>Rev 58 - dgisselq</strong> (3 file(s) modified)</div><div>Added a rudimentary profiling support to the simulator.</div>~ /zipcpu/trunk/bench/cpp/Makefile<br />+ /zipcpu/trunk/bench/cpp/pdump.cpp<br />~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br /> dgisselq Thu, 22 Oct 2015 15:26:48 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=58 Some bug fixes to the dhrystone benchmark, and some compile ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=57 <div><strong>Rev 57 - dgisselq</strong> (3 file(s) modified)</div><div>Some bug fixes to the dhrystone benchmark, and some compile ...</div>~ /zipcpu/trunk/bench/asm/Makefile<br />~ /zipcpu/trunk/bench/asm/zipdhry.S<br />~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br /> dgisselq Mon, 12 Oct 2015 13:30:15 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=57 Here's a bit of work in progress for getting the ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=56 <div><strong>Rev 56 - dgisselq</strong> (10 file(s) modified)</div><div>Here's a bit of work in progress for getting the ...</div>~ /zipcpu/trunk/rtl/aux/wbpriarbiter.v<br />~ /zipcpu/trunk/rtl/core/cpuops.v<br />~ /zipcpu/trunk/rtl/core/pipefetch.v<br />~ /zipcpu/trunk/rtl/core/pipemem.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />+ /zipcpu/trunk/rtl/cpudefs.v<br />~ /zipcpu/trunk/rtl/Makefile<br />~ /zipcpu/trunk/rtl/peripherals/ziptimer.v<br />~ /zipcpu/trunk/rtl/zipbones.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br /> dgisselq Mon, 12 Oct 2015 13:26:05 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=56 A test was added to double check whether carry following ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=55 <div><strong>Rev 55 - dgisselq</strong> (1 file(s) modified)</div><div>A test was added to double check whether carry following ...</div>~ /zipcpu/trunk/sw/zasm/test.S<br /> dgisselq Mon, 12 Oct 2015 13:20:34 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=55 This builds on the support for backslash character escapes in ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=54 <div><strong>Rev 54 - dgisselq</strong> (1 file(s) modified)</div><div>This builds on the support for backslash character escapes in ...</div>~ /zipcpu/trunk/sw/zasm/zasm.l<br /> dgisselq Mon, 12 Oct 2015 13:18:17 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=54 Updated the #include/#define directives to work properly for nested includes. (They ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=53 <div><strong>Rev 53 - dgisselq</strong> (1 file(s) modified)</div><div>Updated the #include/#define directives to work properly for nested includes.<br /> (They ...</div>~ /zipcpu/trunk/sw/zasm/zpp.l<br /> dgisselq Mon, 12 Oct 2015 13:16:56 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2F&rev=53

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