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https://opencores.org/websvn//websvn/listing?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&
Fri, 29 Mar 2024 06:01:42 +0100FeedCreator 1.7.2Added a test to see if the compiler properly handles ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=172
<div><strong>Rev 172 - dgisselq</strong> (1 file(s) modified)</div><div>Added a test to see if the compiler properly handles ...</div>~ /zipcpu/trunk/bench/asm/cputest.c<br />dgisselqThu, 15 Sep 2016 20:02:35 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=172An updated version of the intensive CPU test. This ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=168
<div><strong>Rev 168 - dgisselq</strong> (1 file(s) modified)</div><div>An updated version of the intensive CPU test. This ...</div>+ /zipcpu/trunk/bench/asm/cputest.c<br />dgisselqSat, 16 Jul 2016 20:26:36 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=168Now supports building a simulator that can load ELF files, ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=159
<div><strong>Rev 159 - dgisselq</strong> (1 file(s) modified)</div><div>Now supports building a simulator that can load ELF files, ...</div>~ /zipcpu/trunk/bench/cpp/Makefile<br />dgisselqWed, 15 Jun 2016 00:27:23 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=159Improved debug trace quality, for finding bugs after the fact.
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=155
<div><strong>Rev 155 - dgisselq</strong> (1 file(s) modified)</div><div>Improved debug trace quality, for finding bugs after the fact.</div>~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />dgisselqWed, 15 Jun 2016 00:19:12 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=155Added timing checks on the busy and valid signals: either ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=154
<div><strong>Rev 154 - dgisselq</strong> (1 file(s) modified)</div><div>Added timing checks on the busy and valid signals: either ...</div>~ /zipcpu/trunk/bench/cpp/div_tb.cpp<br />dgisselqWed, 15 Jun 2016 00:17:14 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=154Updated to match the new/updated multiply instructions. Of course, ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=152
<div><strong>Rev 152 - dgisselq</strong> (1 file(s) modified)</div><div>Updated to match the new/updated multiply instructions. Of course, ...</div>~ /zipcpu/trunk/bench/asm/zipdhry.S<br />dgisselqFri, 13 May 2016 02:05:54 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=152Minor formatting change.
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=151
<div><strong>Rev 151 - dgisselq</strong> (1 file(s) modified)</div><div>Minor formatting change.</div>~ /zipcpu/trunk/bench/asm/lfsr.S<br />dgisselqFri, 13 May 2016 02:01:55 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=151Minor changes.
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=150
<div><strong>Rev 150 - dgisselq</strong> (2 file(s) modified)</div><div>Minor changes.</div>~ /zipcpu/trunk/bench/asm/helloworld.S<br />~ /zipcpu/trunk/bench/asm/lodsto.S<br />dgisselqFri, 13 May 2016 02:00:56 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=150Updated the Makefile documentation and the all target.
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=149
<div><strong>Rev 149 - dgisselq</strong> (1 file(s) modified)</div><div>Updated the Makefile documentation and the all target.</div>~ /zipcpu/trunk/bench/cpp/Makefile<br />dgisselqFri, 13 May 2016 01:56:01 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=149Minor changes to get LONG_MPY working, and adjust the documentation.
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=148
<div><strong>Rev 148 - dgisselq</strong> (1 file(s) modified)</div><div>Minor changes to get LONG_MPY working, and adjust the documentation.</div>~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />dgisselqFri, 13 May 2016 01:55:23 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=148Cleans up div_tb a bit, causing it to write SUCCESS ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=147
<div><strong>Rev 147 - dgisselq</strong> (1 file(s) modified)</div><div>Cleans up div_tb a bit, causing it to write SUCCESS ...</div>~ /zipcpu/trunk/bench/cpp/div_tb.cpp<br />dgisselqFri, 13 May 2016 01:54:06 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=147Minor changes, but fixes build of zippy_tb.cpp.
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=140
<div><strong>Rev 140 - dgisselq</strong> (2 file(s) modified)</div><div>Minor changes, but fixes build of zippy_tb.cpp.</div>~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />~ /zipcpu/trunk/rtl/core/idecode.v<br />dgisselqMon, 09 May 2016 12:19:09 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=140Working updates, to keep this up to date with the ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=134
<div><strong>Rev 134 - dgisselq</strong> (1 file(s) modified)</div><div>Working updates, to keep this up to date with the ...</div>~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />dgisselqFri, 22 Apr 2016 00:21:03 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=134Fixed some nasty early branching bugs. Adjusted the Makefile ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=105
<div><strong>Rev 105 - dgisselq</strong> (7 file(s) modified)</div><div>Fixed some nasty early branching bugs. Adjusted the Makefile ...</div>~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />~ /zipcpu/trunk/rtl/core/idecode.v<br />~ /zipcpu/trunk/rtl/core/idecode_deprecated.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/Makefile<br />~ /zipcpu/trunk/rtl/zipbones.v<br />~ /zipcpu/trunk/sw/zasm/test.S<br />dgisselqWed, 09 Mar 2016 15:26:16 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=105Adjusted the operator input line to reflect actual logic inputs, ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=87
<div><strong>Rev 87 - dgisselq</strong> (1 file(s) modified)</div><div>Adjusted the operator input line to reflect actual logic inputs, ...</div>~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />dgisselqSat, 02 Jan 2016 23:56:30 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=87Removed the requirement to have the dev.scope.cpu hardware defined outside
of ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=86
<div><strong>Rev 86 - dgisselq</strong> (1 file(s) modified)</div><div>Removed the requirement to have the dev.scope.cpu hardware defined outside<br />
of ...</div>~ /zipcpu/trunk/bench/asm/zipdhry.S<br />dgisselqSat, 02 Jan 2016 23:55:01 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=86First check-in: the test bench for the divide instruction.
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=77
<div><strong>Rev 77 - dgisselq</strong> (1 file(s) modified)</div><div>First check-in: the test bench for the divide instruction.</div>+ /zipcpu/trunk/bench/cpp/div_tb.cpp<br />dgisselqMon, 28 Dec 2015 20:53:32 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=77The biggest change here was to zippy_tb, to make it ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=76
<div><strong>Rev 76 - dgisselq</strong> (2 file(s) modified)</div><div>The biggest change here was to zippy_tb, to make it ...</div>~ /zipcpu/trunk/bench/cpp/Makefile<br />~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />dgisselqMon, 28 Dec 2015 20:50:30 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=76Modified for VLIW instructions.
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=75
<div><strong>Rev 75 - dgisselq</strong> (1 file(s) modified)</div><div>Modified for VLIW instructions.</div>~ /zipcpu/trunk/bench/cpp/pdump.cpp<br />dgisselqMon, 28 Dec 2015 20:49:16 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=75Added a bunch of debugging code to the Dhrystone benchmark ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=74
<div><strong>Rev 74 - dgisselq</strong> (4 file(s) modified)</div><div>Added a bunch of debugging code to the Dhrystone benchmark ...</div>~ /zipcpu/trunk/bench/asm/Makefile<br />+ /zipcpu/trunk/bench/asm/nullpc.s<br />+ /zipcpu/trunk/bench/asm/poptest.s<br />~ /zipcpu/trunk/bench/asm/zipdhry.S<br />dgisselqMon, 28 Dec 2015 20:48:36 +0100https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fbench%2F&rev=74