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            <br /><b>Error creating feed file, please check write permissions.</b><br /><?xml version="1.0" encoding="ISO-8859-1"?>
<!-- generator="FeedCreator 1.7.2" -->
<rss version="2.0">
    <channel>
        <title>zipcpu</title>
        <description>WebSVN RSS feed - zipcpu</description>
        <link>https://opencores.org/websvn//websvn/listing?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;</link>
        <lastBuildDate>Sat, 18 Apr 2026 04:52:40 +0100</lastBuildDate>
        <generator>FeedCreator 1.7.2</generator>
        <item>
            <title>8b bytes, + formal verification throughout + dcache</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=209</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 209 - dgisselq&lt;/strong&gt; (129 file(s) modified)&lt;/div&gt;&lt;div&gt;8b bytes, + formal verification throughout + dcache&lt;/div&gt;+ /zipcpu/trunk/.gitignore&lt;br /&gt;~ /zipcpu/trunk/bench/asm/Makefile&lt;br /&gt;~ /zipcpu/trunk/bench/asm/zipdhry.S&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/helloworld.c&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/Makefile&lt;br /&gt;+ /zipcpu/trunk/bench/cpp/README.md&lt;br /&gt;+ /zipcpu/trunk/bench/formal&lt;br /&gt;+ /zipcpu/trunk/bench/formal/.gitignore&lt;br /&gt;+ /zipcpu/trunk/bench/formal/abs_div.v&lt;br /&gt;+ /zipcpu/trunk/bench/formal/abs_mpy.v&lt;br /&gt;+ /zipcpu/trunk/bench/formal/abs_prefetch.v&lt;br /&gt;+ /zipcpu/trunk/bench/formal/busdelay.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/cpuops.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/dblfetch.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/dcache.gtkw&lt;br /&gt;+ /zipcpu/trunk/bench/formal/dcache.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/div.gtkw&lt;br /&gt;+ /zipcpu/trunk/bench/formal/div.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/f_idecode.v&lt;br /&gt;+ /zipcpu/trunk/bench/formal/icontrol.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/idecode.gtkw&lt;br /&gt;+ /zipcpu/trunk/bench/formal/idecode.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/Makefile&lt;br /&gt;+ /zipcpu/trunk/bench/formal/mcve.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/mcve.v&lt;br /&gt;+ /zipcpu/trunk/bench/formal/memops.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/pfcache.gtkw&lt;br /&gt;+ /zipcpu/trunk/bench/formal/pfcache.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/pipemem.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/prefetch.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/wbdblpriarb.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/wbdmac.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/wbpriarbiter.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/wbwatchdog.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/zipcounter.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/zipcpu.gtkw&lt;br /&gt;+ /zipcpu/trunk/bench/formal/zipcpu.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/zipjiffies.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/zipmmu.gtkw&lt;br /&gt;+ /zipcpu/trunk/bench/formal/zipmmu.sby&lt;br /&gt;+ /zipcpu/trunk/bench/formal/ziptimer.sby&lt;br /&gt;+ /zipcpu/trunk/bench/rtl&lt;br /&gt;+ /zipcpu/trunk/bench/rtl/Makefile&lt;br /&gt;+ /zipcpu/trunk/bench/rtl/memdev.v&lt;br /&gt;+ /zipcpu/trunk/bench/rtl/zipmmu_tb.v&lt;br /&gt;+ /zipcpu/trunk/doc/.gitignore&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/.gitignore&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/cpu.dia&lt;br /&gt;~ /zipcpu/trunk/doc/nextgen.html&lt;br /&gt;~ /zipcpu/trunk/doc/orconf.pdf&lt;br /&gt;+ /zipcpu/trunk/doc/orconf2017.pdf&lt;br /&gt;+ /zipcpu/trunk/doc/orconf2018.pdf&lt;br /&gt;~ /zipcpu/trunk/doc/spec.pdf&lt;br /&gt;~ /zipcpu/trunk/doc/src/spec.tex&lt;br /&gt;~ /zipcpu/trunk/INSTALL.md&lt;br /&gt;~ /zipcpu/trunk/Makefile&lt;br /&gt;~ /zipcpu/trunk/README.md&lt;br /&gt;~ /zipcpu/trunk/rtl/core&lt;br /&gt;~ /zipcpu/trunk/rtl/core/cpuops.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/dblfetch.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/dcache.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/div.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/idecode.v&lt;br /&gt;+ /zipcpu/trunk/rtl/core/iscachable.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/memops.v&lt;br /&gt;+ /zipcpu/trunk/rtl/core/mpyop.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/pfcache.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/pipefetch.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/pipemem.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/prefetch.v&lt;br /&gt;+ /zipcpu/trunk/rtl/core/README.md&lt;br /&gt;+ /zipcpu/trunk/rtl/core/slowmpy.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/zipcpu.v&lt;br /&gt;~ /zipcpu/trunk/rtl/cpudefs.v&lt;br /&gt;+ /zipcpu/trunk/rtl/ex&lt;br /&gt;+ /zipcpu/trunk/rtl/ex/busdelay.v&lt;br /&gt;+ /zipcpu/trunk/rtl/ex/fwb_counter.v&lt;br /&gt;+ /zipcpu/trunk/rtl/ex/fwb_master.v&lt;br /&gt;+ /zipcpu/trunk/rtl/ex/fwb_slave.v&lt;br /&gt;+ /zipcpu/trunk/rtl/ex/wbarbiter.v&lt;br /&gt;+ /zipcpu/trunk/rtl/ex/wbdblpriarb.v&lt;br /&gt;+ /zipcpu/trunk/rtl/ex/wbpriarbiter.v&lt;br /&gt;~ /zipcpu/trunk/rtl/Makefile&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/icontrol.v&lt;br /&gt;+ /zipcpu/trunk/rtl/peripherals/README.md&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/wbdmac.v&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/wbwatchdog.v&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/zipcounter.v&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/zipjiffies.v&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/zipmmu.v&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/ziptimer.v&lt;br /&gt;+ /zipcpu/trunk/rtl/README.md&lt;br /&gt;~ /zipcpu/trunk/rtl/zipbones.v&lt;br /&gt;~ /zipcpu/trunk/rtl/zipsystem.v&lt;br /&gt;~ /zipcpu/trunk/sim/cpp&lt;br /&gt;~ /zipcpu/trunk/sim/cpp/Makefile&lt;br /&gt;+ /zipcpu/trunk/sim/cpp/README.md&lt;br /&gt;~ /zipcpu/trunk/sim/cpp/twoc.cpp&lt;br /&gt;~ /zipcpu/trunk/sim/cpp/twoc.h&lt;br /&gt;~ /zipcpu/trunk/sim/cpp/zipelf.cpp&lt;br /&gt;~ /zipcpu/trunk/sim/cpp/zipelf.h&lt;br /&gt;~ /zipcpu/trunk/sim/cpp/zsim.cpp&lt;br /&gt;~ /zipcpu/trunk/sim/verilator&lt;br /&gt;~ /zipcpu/trunk/sim/verilator/.gitignore&lt;br /&gt;~ /zipcpu/trunk/sim/verilator/div_tb.cpp&lt;br /&gt;~ /zipcpu/trunk/sim/verilator/Makefile&lt;br /&gt;~ /zipcpu/trunk/sim/verilator/memsim.h&lt;br /&gt;~ /zipcpu/trunk/sim/verilator/mpy_tb.cpp&lt;br /&gt;~ /zipcpu/trunk/sim/verilator/pdump.cpp&lt;br /&gt;~ /zipcpu/trunk/sim/verilator/pfcache_tb.cpp&lt;br /&gt;+ /zipcpu/trunk/sim/verilator/README.md&lt;br /&gt;~ /zipcpu/trunk/sim/verilator/testb.h&lt;br /&gt;~ /zipcpu/trunk/sim/verilator/twoc.cpp&lt;br /&gt;~ /zipcpu/trunk/sim/verilator/twoc.h&lt;br /&gt;+ /zipcpu/trunk/sim/verilator/vversion.sh&lt;br /&gt;+ /zipcpu/trunk/sim/verilator/zipcpu_tb.cpp&lt;br /&gt;~ /zipcpu/trunk/sim/verilator/zipmmu_tb.cpp&lt;br /&gt;~ /zipcpu/trunk/sw&lt;br /&gt;~ /zipcpu/trunk/sw/.gitignore&lt;br /&gt;~ /zipcpu/trunk/sw/gas-script.sh&lt;br /&gt;~ /zipcpu/trunk/sw/gas-zippatch.patch&lt;br /&gt;~ /zipcpu/trunk/sw/gcc-script.sh&lt;br /&gt;~ /zipcpu/trunk/sw/gcc-zippatch.patch&lt;br /&gt;~ /zipcpu/trunk/sw/Makefile&lt;br /&gt;~ /zipcpu/trunk/sw/nlib-script.sh&lt;br /&gt;~ /zipcpu/trunk/sw/nlib-zippatch.patch&lt;br /&gt;+ /zipcpu/trunk/sw/README.md&lt;br /&gt;~ /zipcpu/trunk/sw/zasm&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/.gitignore&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Tue, 19 Mar 2019 03:24:12 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=209</guid>
        </item>
        <item>
            <title>Additional ZipCPU changes associated w 8b upgrade</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=202</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 202 - dgisselq&lt;/strong&gt; (38 file(s) modified)&lt;/div&gt;&lt;div&gt;Additional ZipCPU changes associated w 8b upgrade&lt;/div&gt;~ /zipcpu/trunk/bench/asm/cputest.c&lt;br /&gt;~ /zipcpu/trunk/bench/asm/Makefile&lt;br /&gt;~ /zipcpu/trunk/bench/asm/zipdhry.S&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/Makefile&lt;br /&gt;~ /zipcpu/trunk/doc/gfx&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/bus-structure.eps&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/bus-structure.png&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/cpu.eps&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/zipbones.eps&lt;br /&gt;- /zipcpu/trunk/doc/iset.html&lt;br /&gt;~ /zipcpu/trunk/doc/Makefile&lt;br /&gt;+ /zipcpu/trunk/doc/memsurvey.png&lt;br /&gt;+ /zipcpu/trunk/doc/nextgen.html&lt;br /&gt;+ /zipcpu/trunk/doc/nextgen.png&lt;br /&gt;~ /zipcpu/trunk/doc/spec.pdf&lt;br /&gt;~ /zipcpu/trunk/doc/src/spec.tex&lt;br /&gt;~ /zipcpu/trunk/Makefile&lt;br /&gt;~ /zipcpu/trunk/sw&lt;br /&gt;+ /zipcpu/trunk/sw/.gitignore&lt;br /&gt;- /zipcpu/trunk/sw/binutils-2.25.patch&lt;br /&gt;- /zipcpu/trunk/sw/binutils-2.25.tar.bz2&lt;br /&gt;+ /zipcpu/trunk/sw/binutils-2.27.tar.bz2&lt;br /&gt;~ /zipcpu/trunk/sw/gas-script.sh&lt;br /&gt;+ /zipcpu/trunk/sw/gas-zippatch.patch&lt;br /&gt;+ /zipcpu/trunk/sw/gcc-6.2.0.tar.bz2&lt;br /&gt;~ /zipcpu/trunk/sw/gcc-script.sh&lt;br /&gt;~ /zipcpu/trunk/sw/gcc-zippatch.patch&lt;br /&gt;~ /zipcpu/trunk/sw/Makefile&lt;br /&gt;+ /zipcpu/trunk/sw/newlib-2.5.0.tar.gz&lt;br /&gt;+ /zipcpu/trunk/sw/nlib-script.sh&lt;br /&gt;+ /zipcpu/trunk/sw/nlib-zippatch.patch&lt;br /&gt;~ /zipcpu/trunk/sw/zasm&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/.gitignore&lt;br /&gt;- /zipcpu/trunk/sw/zasm/obj-pc&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/README.md&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zopcodes.cpp&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zopcodes.h&lt;br /&gt;~ /zipcpu/trunk/zip.vim&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Thu, 09 Mar 2017 19:13:56 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=202</guid>
        </item>
        <item>
            <title>Added a test to see if the compiler properly handles ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=172</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 172 - dgisselq&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Added a test to see if the compiler properly handles ...&lt;/div&gt;~ /zipcpu/trunk/bench/asm/cputest.c&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Thu, 15 Sep 2016 20:02:35 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=172</guid>
        </item>
        <item>
            <title>An updated version of the intensive CPU test.  This ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=168</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 168 - dgisselq&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;An updated version of the intensive CPU test.  This ...&lt;/div&gt;+ /zipcpu/trunk/bench/asm/cputest.c&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Sat, 16 Jul 2016 20:26:36 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=168</guid>
        </item>
        <item>
            <title>Updated to match the new/updated multiply instructions.  Of course, ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=152</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 152 - dgisselq&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Updated to match the new/updated multiply instructions.  Of course, ...&lt;/div&gt;~ /zipcpu/trunk/bench/asm/zipdhry.S&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Fri, 13 May 2016 02:05:54 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=152</guid>
        </item>
        <item>
            <title>Minor formatting change.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=151</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 151 - dgisselq&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Minor formatting change.&lt;/div&gt;~ /zipcpu/trunk/bench/asm/lfsr.S&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Fri, 13 May 2016 02:01:55 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=151</guid>
        </item>
        <item>
            <title>Minor changes.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=150</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 150 - dgisselq&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Minor changes.&lt;/div&gt;~ /zipcpu/trunk/bench/asm/helloworld.S&lt;br /&gt;~ /zipcpu/trunk/bench/asm/lodsto.S&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Fri, 13 May 2016 02:00:56 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=150</guid>
        </item>
        <item>
            <title>Removed the requirement to have the dev.scope.cpu hardware defined outside
of ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=86</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 86 - dgisselq&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Removed the requirement to have the dev.scope.cpu hardware defined outside&lt;br /&gt;
of ...&lt;/div&gt;~ /zipcpu/trunk/bench/asm/zipdhry.S&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Sat, 02 Jan 2016 23:55:01 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=86</guid>
        </item>
        <item>
            <title>Added a bunch of debugging code to the Dhrystone benchmark ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=74</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 74 - dgisselq&lt;/strong&gt; (4 file(s) modified)&lt;/div&gt;&lt;div&gt;Added a bunch of debugging code to the Dhrystone benchmark ...&lt;/div&gt;~ /zipcpu/trunk/bench/asm/Makefile&lt;br /&gt;+ /zipcpu/trunk/bench/asm/nullpc.s&lt;br /&gt;+ /zipcpu/trunk/bench/asm/poptest.s&lt;br /&gt;~ /zipcpu/trunk/bench/asm/zipdhry.S&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Mon, 28 Dec 2015 20:48:36 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=74</guid>
        </item>
        <item>
            <title>This implements the &amp;quot;new Instruction Set&amp;quot; architecture for the Zip ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=69</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 69 - dgisselq&lt;/strong&gt; (85 file(s) modified)&lt;/div&gt;&lt;div&gt;This implements the &amp;quot;new Instruction Set&amp;quot; architecture for the Zip ...&lt;/div&gt;~ /zipcpu/trunk/bench/asm/helloworld.S&lt;br /&gt;~ /zipcpu/trunk/bench/asm/ivec.S&lt;br /&gt;~ /zipcpu/trunk/bench/asm/lodsto.S&lt;br /&gt;~ /zipcpu/trunk/bench/asm/Makefile&lt;br /&gt;~ /zipcpu/trunk/bench/asm/pcpc.S&lt;br /&gt;~ /zipcpu/trunk/bench/asm/testdiv.S&lt;br /&gt;~ /zipcpu/trunk/bench/asm/wdt.S&lt;br /&gt;~ /zipcpu/trunk/bench/asm/zipdhry.S&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/Makefile&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/memsim.cpp&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/memsim.h&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/pdump.cpp&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/testb.h&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/twoc.cpp&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/twoc.h&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/bc.eps&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/bra.eps&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/cpu.dia&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/cpu.eps&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/cpu.png&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/memrd.eps&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/memwr.eps&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/regset.png&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/system.dia&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/system.eps&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/system.png&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/zipbones.dia&lt;br /&gt;~ /zipcpu/trunk/doc/gfx/zipbones.png&lt;br /&gt;~ /zipcpu/trunk/doc/iset.html&lt;br /&gt;~ /zipcpu/trunk/doc/Makefile&lt;br /&gt;~ /zipcpu/trunk/doc/spec.pdf&lt;br /&gt;~ /zipcpu/trunk/doc/src/spec.tex&lt;br /&gt;~ /zipcpu/trunk/Makefile&lt;br /&gt;~ /zipcpu/trunk/rtl/aux/busdelay.v&lt;br /&gt;~ /zipcpu/trunk/rtl/aux/wbarbiter.v&lt;br /&gt;~ /zipcpu/trunk/rtl/aux/wbdblpriarb.v&lt;br /&gt;~ /zipcpu/trunk/rtl/aux/wbpriarbiter.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/cpuops.v&lt;br /&gt;+ /zipcpu/trunk/rtl/core/cpuops_deprecated.v&lt;br /&gt;+ /zipcpu/trunk/rtl/core/div.v&lt;br /&gt;+ /zipcpu/trunk/rtl/core/idecode.v&lt;br /&gt;+ /zipcpu/trunk/rtl/core/idecode_deprecated.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/memops.v&lt;br /&gt;+ /zipcpu/trunk/rtl/core/pfcache.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/pipefetch.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/pipemem.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/prefetch.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/zipcpu.v&lt;br /&gt;~ /zipcpu/trunk/rtl/cpudefs.v&lt;br /&gt;~ /zipcpu/trunk/rtl/Makefile&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/flashcache.v&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/icontrol.v&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/wbdmac.v&lt;br /&gt;+ /zipcpu/trunk/rtl/peripherals/wbwatchdog.v&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/zipcounter.v&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/zipjiffies.v&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/ziptimer.v&lt;br /&gt;~ /zipcpu/trunk/rtl/peripherals/ziptrap.v&lt;br /&gt;~ /zipcpu/trunk/rtl/zipbones.v&lt;br /&gt;~ /zipcpu/trunk/rtl/zipsystem.v&lt;br /&gt;~ /zipcpu/trunk/sw/lib/divs.S&lt;br /&gt;~ /zipcpu/trunk/sw/lib/divu.S&lt;br /&gt;~ /zipcpu/trunk/sw/lib/mpy32s.S&lt;br /&gt;~ /zipcpu/trunk/sw/lib/mpy32u.S&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/asmdata.cpp&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/asmdata.h&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/Makefile&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/optest.cpp&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/sys.i&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/test.S&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/twoc.cpp&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/twoc.h&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zasm.l&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zasm.y&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zdump.cpp&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zopcodes.cpp&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zopcodes.h&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zparser.cpp&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zparser.h&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zpp.l&lt;br /&gt;~ /zipcpu/trunk/sw/zipdbg/devbus.h&lt;br /&gt;~ /zipcpu/trunk/sw/zipdbg/regdefs.h&lt;br /&gt;~ /zipcpu/trunk/sw/zipdbg/zipdbg.cpp&lt;br /&gt;+ /zipcpu/trunk/zip.vim&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Tue, 22 Dec 2015 16:06:51 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=69</guid>
        </item>
        <item>
            <title>Some bug fixes to the dhrystone benchmark, and some compile ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=57</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 57 - dgisselq&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;Some bug fixes to the dhrystone benchmark, and some compile ...&lt;/div&gt;~ /zipcpu/trunk/bench/asm/Makefile&lt;br /&gt;~ /zipcpu/trunk/bench/asm/zipdhry.S&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Mon, 12 Oct 2015 13:30:15 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=57</guid>
        </item>
        <item>
            <title>Dhrystone benchmark updates--added the copyright notice.  (Oops!)</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=50</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 50 - dgisselq&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;Dhrystone benchmark updates--added the copyright notice.  (Oops!)&lt;/div&gt;~ /zipcpu/trunk/bench/asm/Makefile&lt;br /&gt;~ /zipcpu/trunk/bench/asm/testdiv.S&lt;br /&gt;~ /zipcpu/trunk/bench/asm/zipdhry.S&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Fri, 02 Oct 2015 21:53:44 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=50</guid>
        </item>
        <item>
            <title>Oops -- forgot to add the stack.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=42</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 42 - dgisselq&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Oops -- forgot to add the stack.&lt;/div&gt;+ /zipcpu/trunk/bench/asm/stack.S&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Fri, 02 Oct 2015 21:36:30 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=42</guid>
        </item>
        <item>
            <title>Assembly file for the Dhrystone benchmark added.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=41</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 41 - dgisselq&lt;/strong&gt; (4 file(s) modified)&lt;/div&gt;&lt;div&gt;Assembly file for the Dhrystone benchmark added.&lt;/div&gt;- /zipcpu/trunk/bench/asm/lfsrleds.S&lt;br /&gt;+ /zipcpu/trunk/bench/asm/Makefile&lt;br /&gt;+ /zipcpu/trunk/bench/asm/testdiv.S&lt;br /&gt;+ /zipcpu/trunk/bench/asm/zipdhry.S&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Fri, 02 Oct 2015 21:35:49 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=41</guid>
        </item>
        <item>
            <title>Quick update, updates the assembly for the new version of ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=40</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 40 - dgisselq&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Quick update, updates the assembly for the new version of ...&lt;/div&gt;~ /zipcpu/trunk/bench/asm/wdt.S&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Fri, 02 Oct 2015 21:33:06 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=40</guid>
        </item>
        <item>
            <title>*Lots* of changes to increase processing speed and remove pipeline ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=36</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 36 - dgisselq&lt;/strong&gt; (34 file(s) modified)&lt;/div&gt;&lt;div&gt;*Lots* of changes to increase processing speed and remove pipeline ...&lt;/div&gt;+ /zipcpu/trunk/bench/asm/lfsrleds.S&lt;br /&gt;~ /zipcpu/trunk/bench/asm/lodsto.S&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/Makefile&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/memsim.cpp&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/memsim.h&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/testb.h&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/zippipe.dia&lt;br /&gt;~ /zipcpu/trunk/doc/Makefile&lt;br /&gt;~ /zipcpu/trunk/doc/spec.pdf&lt;br /&gt;~ /zipcpu/trunk/doc/src/spec.tex&lt;br /&gt;~ /zipcpu/trunk/Makefile&lt;br /&gt;~ /zipcpu/trunk/rtl/aux/busdelay.v&lt;br /&gt;~ /zipcpu/trunk/rtl/aux/wbarbiter.v&lt;br /&gt;+ /zipcpu/trunk/rtl/aux/wbdblpriarb.v&lt;br /&gt;+ /zipcpu/trunk/rtl/aux/wbpriarbiter.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/memops.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/pipefetch.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/prefetch.v&lt;br /&gt;~ /zipcpu/trunk/rtl/core/zipcpu.v&lt;br /&gt;~ /zipcpu/trunk/rtl/Makefile&lt;br /&gt;+ /zipcpu/trunk/rtl/peripherals/wbdmac.v&lt;br /&gt;+ /zipcpu/trunk/rtl/peripherals/zipport.v&lt;br /&gt;~ /zipcpu/trunk/rtl/zipsystem.v&lt;br /&gt;+ /zipcpu/trunk/sw/lib&lt;br /&gt;+ /zipcpu/trunk/sw/lib/divs.S&lt;br /&gt;+ /zipcpu/trunk/sw/lib/divu.S&lt;br /&gt;+ /zipcpu/trunk/sw/lib/mpy32s.S&lt;br /&gt;+ /zipcpu/trunk/sw/lib/mpy32u.S&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/asmdata.cpp&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/sys.i&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/test.S&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zasm.y&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zpp.l&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Sun, 20 Sep 2015 13:09:46 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=36</guid>
        </item>
        <item>
            <title>Bunch of changes while trying to get a hello world ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=12</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 12 - dgisselq&lt;/strong&gt; (4 file(s) modified)&lt;/div&gt;&lt;div&gt;Bunch of changes while trying to get a hello world ...&lt;/div&gt;+ /zipcpu/trunk/bench/asm/helloworld.S&lt;br /&gt;~ /zipcpu/trunk/rtl/core/cpuops.v&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zdump.cpp&lt;br /&gt;~ /zipcpu/trunk/sw/zasm/zparser.cpp&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Tue, 28 Jul 2015 20:12:12 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=12</guid>
        </item>
        <item>
            <title>This version works on an FPGA!!!

(Or at least the wdt.S ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=11</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 11 - dgisselq&lt;/strong&gt; (5 file(s) modified)&lt;/div&gt;&lt;div&gt;This version works on an FPGA!!!&lt;br /&gt;
&lt;br /&gt;
(Or at least the wdt.S ...&lt;/div&gt;+ /zipcpu/trunk/bench/asm/lfsr.S&lt;br /&gt;~ /zipcpu/trunk/bench/asm/wdt.S&lt;br /&gt;~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp&lt;br /&gt;~ /zipcpu/trunk/rtl/core/pipefetch.v&lt;br /&gt;~ /zipcpu/trunk/rtl/zipsystem.v&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Tue, 28 Jul 2015 11:53:26 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=11</guid>
        </item>
        <item>
            <title>Here's the watchdog timer code, as well as some pictures ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=10</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 10 - dgisselq&lt;/strong&gt; (4 file(s) modified)&lt;/div&gt;&lt;div&gt;Here's the watchdog timer code, as well as some pictures ...&lt;/div&gt;+ /zipcpu/trunk/bench/asm/wdt.S&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/regset.dia&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/regset.eps&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/regset.png&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Mon, 27 Jul 2015 22:32:49 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=10</guid>
        </item>
        <item>
            <title>An initial load.  No promises of what works or ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=2</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 2 - dgisselq&lt;/strong&gt; (58 file(s) modified)&lt;/div&gt;&lt;div&gt;An initial load.  No promises of what works or ...&lt;/div&gt;+ /zipcpu/trunk/bench&lt;br /&gt;+ /zipcpu/trunk/bench/asm&lt;br /&gt;+ /zipcpu/trunk/bench/asm/ivec.S&lt;br /&gt;+ /zipcpu/trunk/bench/asm/lodsto.S&lt;br /&gt;+ /zipcpu/trunk/bench/asm/pcpc.S&lt;br /&gt;+ /zipcpu/trunk/bench/cpp&lt;br /&gt;+ /zipcpu/trunk/bench/cpp/Makefile&lt;br /&gt;+ /zipcpu/trunk/bench/cpp/memsim.cpp&lt;br /&gt;+ /zipcpu/trunk/bench/cpp/memsim.h&lt;br /&gt;+ /zipcpu/trunk/bench/cpp/testb.h&lt;br /&gt;+ /zipcpu/trunk/bench/cpp/twoc.cpp&lt;br /&gt;+ /zipcpu/trunk/bench/cpp/twoc.h&lt;br /&gt;+ /zipcpu/trunk/bench/cpp/zippy_tb.cpp&lt;br /&gt;+ /zipcpu/trunk/doc&lt;br /&gt;+ /zipcpu/trunk/doc/gfx&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/cpu.dia&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/cpu.eps&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/cpu.png&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/iset.html&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/system.dia&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/system.eps&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/system.png&lt;br /&gt;+ /zipcpu/trunk/doc/gfx/topng.sh&lt;br /&gt;+ /zipcpu/trunk/rtl&lt;br /&gt;+ /zipcpu/trunk/rtl/aux&lt;br /&gt;+ /zipcpu/trunk/rtl/aux/busdelay.v&lt;br /&gt;+ /zipcpu/trunk/rtl/aux/wbarbiter.v&lt;br /&gt;+ /zipcpu/trunk/rtl/core&lt;br /&gt;+ /zipcpu/trunk/rtl/core/cpuops.v&lt;br /&gt;+ /zipcpu/trunk/rtl/core/memops.v&lt;br /&gt;+ /zipcpu/trunk/rtl/core/pipefetch.v&lt;br /&gt;+ /zipcpu/trunk/rtl/core/prefetch.v&lt;br /&gt;+ /zipcpu/trunk/rtl/core/zipcpu.v&lt;br /&gt;+ /zipcpu/trunk/rtl/Makefile&lt;br /&gt;+ /zipcpu/trunk/rtl/peripherals&lt;br /&gt;+ /zipcpu/trunk/rtl/peripherals/flashcache.v&lt;br /&gt;+ /zipcpu/trunk/rtl/peripherals/icontrol.v&lt;br /&gt;+ /zipcpu/trunk/rtl/peripherals/zipcounter.v&lt;br /&gt;+ /zipcpu/trunk/rtl/peripherals/zipjiffies.v&lt;br /&gt;+ /zipcpu/trunk/rtl/peripherals/ziptimer.v&lt;br /&gt;+ /zipcpu/trunk/rtl/peripherals/ziptrap.v&lt;br /&gt;+ /zipcpu/trunk/rtl/zipsystem.v&lt;br /&gt;+ /zipcpu/trunk/sw&lt;br /&gt;+ /zipcpu/trunk/sw/zasm&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/Makefile&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/obj-pc&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/obj-pc/depends.txt&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/optest.cpp&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/tags&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/test.S&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/twoc.cpp&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/twoc.h&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/zasm.cpp&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/zdump.cpp&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/zopcodes.cpp&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/zopcodes.h&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/zparser.cpp&lt;br /&gt;+ /zipcpu/trunk/sw/zasm/zparser.h&lt;br /&gt;</description>
            <author>dgisselq</author>
            <pubDate>Sun, 26 Jul 2015 21:38:38 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=zipcpu&amp;path=%2Fzipcpu%2Ftrunk%2Fbench%2Fasm%2F&amp;rev=2</guid>
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