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zipcpu WebSVN RSS feed - zipcpu https://opencores.org/websvn//websvn/listing?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fspec.pdf& Wed, 10 Aug 2022 22:40:30 +0100 FeedCreator 1.7.2 Changes necessary to document the changed instruction set: LDIHI became ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=139 <div><strong>Rev 139 - dgisselq</strong> (2 file(s) modified)</div><div>Changes necessary to document the changed instruction set: LDIHI became ...</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br /> dgisselq Fri, 06 May 2016 15:01:59 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=139 Adjustments made to match the simplified early branching. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=92 <div><strong>Rev 92 - dgisselq</strong> (2 file(s) modified)</div><div>Adjustments made to match the simplified early branching.</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br /> dgisselq Thu, 28 Jan 2016 22:10:42 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=92 Documentations updates. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=73 <div><strong>Rev 73 - dgisselq</strong> (3 file(s) modified)</div><div>Documentations updates.</div>~ /zipcpu/trunk/doc/iset.html<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br /> dgisselq Mon, 28 Dec 2015 20:39:21 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=73 This implements the &quot;new Instruction Set&quot; architecture for the Zip ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=69 <div><strong>Rev 69 - dgisselq</strong> (85 file(s) modified)</div><div>This implements the &quot;new Instruction Set&quot; architecture for the Zip ...</div>~ /zipcpu/trunk/bench/asm/helloworld.S<br />~ /zipcpu/trunk/bench/asm/ivec.S<br />~ /zipcpu/trunk/bench/asm/lodsto.S<br />~ /zipcpu/trunk/bench/asm/Makefile<br />~ /zipcpu/trunk/bench/asm/pcpc.S<br />~ /zipcpu/trunk/bench/asm/testdiv.S<br />~ /zipcpu/trunk/bench/asm/wdt.S<br />~ /zipcpu/trunk/bench/asm/zipdhry.S<br />~ /zipcpu/trunk/bench/cpp/Makefile<br />~ /zipcpu/trunk/bench/cpp/memsim.cpp<br />~ /zipcpu/trunk/bench/cpp/memsim.h<br />~ /zipcpu/trunk/bench/cpp/pdump.cpp<br />~ /zipcpu/trunk/bench/cpp/testb.h<br />~ /zipcpu/trunk/bench/cpp/twoc.cpp<br />~ /zipcpu/trunk/bench/cpp/twoc.h<br />~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />~ /zipcpu/trunk/doc/gfx/bc.eps<br />~ /zipcpu/trunk/doc/gfx/bra.eps<br />~ /zipcpu/trunk/doc/gfx/cpu.dia<br />~ /zipcpu/trunk/doc/gfx/cpu.eps<br />~ /zipcpu/trunk/doc/gfx/cpu.png<br />~ /zipcpu/trunk/doc/gfx/memrd.eps<br />~ /zipcpu/trunk/doc/gfx/memwr.eps<br />~ /zipcpu/trunk/doc/gfx/regset.png<br />~ /zipcpu/trunk/doc/gfx/system.dia<br />~ /zipcpu/trunk/doc/gfx/system.eps<br />~ /zipcpu/trunk/doc/gfx/system.png<br />~ /zipcpu/trunk/doc/gfx/zipbones.dia<br />~ /zipcpu/trunk/doc/gfx/zipbones.png<br />~ /zipcpu/trunk/doc/iset.html<br />~ /zipcpu/trunk/doc/Makefile<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />~ /zipcpu/trunk/Makefile<br />~ /zipcpu/trunk/rtl/aux/busdelay.v<br />~ /zipcpu/trunk/rtl/aux/wbarbiter.v<br />~ /zipcpu/trunk/rtl/aux/wbdblpriarb.v<br />~ /zipcpu/trunk/rtl/aux/wbpriarbiter.v<br />~ /zipcpu/trunk/rtl/core/cpuops.v<br />+ /zipcpu/trunk/rtl/core/cpuops_deprecated.v<br />+ /zipcpu/trunk/rtl/core/div.v<br />+ /zipcpu/trunk/rtl/core/idecode.v<br />+ /zipcpu/trunk/rtl/core/idecode_deprecated.v<br />~ /zipcpu/trunk/rtl/core/memops.v<br />+ /zipcpu/trunk/rtl/core/pfcache.v<br />~ /zipcpu/trunk/rtl/core/pipefetch.v<br />~ /zipcpu/trunk/rtl/core/pipemem.v<br />~ /zipcpu/trunk/rtl/core/prefetch.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/cpudefs.v<br />~ /zipcpu/trunk/rtl/Makefile<br />~ /zipcpu/trunk/rtl/peripherals/flashcache.v<br />~ /zipcpu/trunk/rtl/peripherals/icontrol.v<br />~ /zipcpu/trunk/rtl/peripherals/wbdmac.v<br />+ /zipcpu/trunk/rtl/peripherals/wbwatchdog.v<br />~ /zipcpu/trunk/rtl/peripherals/zipcounter.v<br />~ /zipcpu/trunk/rtl/peripherals/zipjiffies.v<br />~ /zipcpu/trunk/rtl/peripherals/ziptimer.v<br />~ /zipcpu/trunk/rtl/peripherals/ziptrap.v<br />~ /zipcpu/trunk/rtl/zipbones.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />~ /zipcpu/trunk/sw/lib/divs.S<br />~ /zipcpu/trunk/sw/lib/divu.S<br />~ /zipcpu/trunk/sw/lib/mpy32s.S<br />~ /zipcpu/trunk/sw/lib/mpy32u.S<br />~ /zipcpu/trunk/sw/zasm/asmdata.cpp<br />~ /zipcpu/trunk/sw/zasm/asmdata.h<br />~ /zipcpu/trunk/sw/zasm/Makefile<br />~ /zipcpu/trunk/sw/zasm/optest.cpp<br />~ /zipcpu/trunk/sw/zasm/sys.i<br />~ /zipcpu/trunk/sw/zasm/test.S<br />~ /zipcpu/trunk/sw/zasm/twoc.cpp<br />~ /zipcpu/trunk/sw/zasm/twoc.h<br />~ /zipcpu/trunk/sw/zasm/zasm.l<br />~ /zipcpu/trunk/sw/zasm/zasm.y<br />~ /zipcpu/trunk/sw/zasm/zdump.cpp<br />~ /zipcpu/trunk/sw/zasm/zopcodes.cpp<br />~ /zipcpu/trunk/sw/zasm/zopcodes.h<br />~ /zipcpu/trunk/sw/zasm/zparser.cpp<br />~ /zipcpu/trunk/sw/zasm/zparser.h<br />~ /zipcpu/trunk/sw/zasm/zpp.l<br />~ /zipcpu/trunk/sw/zipdbg/devbus.h<br />~ /zipcpu/trunk/sw/zipdbg/regdefs.h<br />~ /zipcpu/trunk/sw/zipdbg/zipdbg.cpp<br />+ /zipcpu/trunk/zip.vim<br /> dgisselq Tue, 22 Dec 2015 16:06:51 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=69 Updated specification, includes well illustrated pipeline discussion. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=68 <div><strong>Rev 68 - dgisselq</strong> (3 file(s) modified)</div><div>Updated specification, includes well illustrated pipeline discussion.</div>~ /zipcpu/trunk/doc/Makefile<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br /> dgisselq Tue, 17 Nov 2015 15:44:50 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=68 Here's the documentation update to support the pipelined read/writes of the ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=39 <div><strong>Rev 39 - dgisselq</strong> (5 file(s) modified)</div><div>Here's the documentation update to support the pipelined read/writes of<br /> the ...</div>~ /zipcpu/trunk/bench/cpp/Makefile<br />~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />~ /zipcpu/trunk/sw/zasm/test.S<br /> dgisselq Tue, 29 Sep 2015 18:48:13 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=39 Fixed some minor spelling errors. https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=37 <div><strong>Rev 37 - dgisselq</strong> (2 file(s) modified)</div><div>Fixed some minor spelling errors.</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br /> dgisselq Mon, 21 Sep 2015 01:51:27 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=37 *Lots* of changes to increase processing speed and remove pipeline ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=36 <div><strong>Rev 36 - dgisselq</strong> (34 file(s) modified)</div><div>*Lots* of changes to increase processing speed and remove pipeline ...</div>+ /zipcpu/trunk/bench/asm/lfsrleds.S<br />~ /zipcpu/trunk/bench/asm/lodsto.S<br />~ /zipcpu/trunk/bench/cpp/Makefile<br />~ /zipcpu/trunk/bench/cpp/memsim.cpp<br />~ /zipcpu/trunk/bench/cpp/memsim.h<br />~ /zipcpu/trunk/bench/cpp/testb.h<br />~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />+ /zipcpu/trunk/doc/gfx/zippipe.dia<br />~ /zipcpu/trunk/doc/Makefile<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />~ /zipcpu/trunk/Makefile<br />~ /zipcpu/trunk/rtl/aux/busdelay.v<br />~ /zipcpu/trunk/rtl/aux/wbarbiter.v<br />+ /zipcpu/trunk/rtl/aux/wbdblpriarb.v<br />+ /zipcpu/trunk/rtl/aux/wbpriarbiter.v<br />~ /zipcpu/trunk/rtl/core/memops.v<br />~ /zipcpu/trunk/rtl/core/pipefetch.v<br />~ /zipcpu/trunk/rtl/core/prefetch.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/Makefile<br />+ /zipcpu/trunk/rtl/peripherals/wbdmac.v<br />+ /zipcpu/trunk/rtl/peripherals/zipport.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />+ /zipcpu/trunk/sw/lib<br />+ /zipcpu/trunk/sw/lib/divs.S<br />+ /zipcpu/trunk/sw/lib/divu.S<br />+ /zipcpu/trunk/sw/lib/mpy32s.S<br />+ /zipcpu/trunk/sw/lib/mpy32u.S<br />~ /zipcpu/trunk/sw/zasm/asmdata.cpp<br />~ /zipcpu/trunk/sw/zasm/sys.i<br />~ /zipcpu/trunk/sw/zasm/test.S<br />~ /zipcpu/trunk/sw/zasm/zasm.y<br />~ /zipcpu/trunk/sw/zasm/zpp.l<br /> dgisselq Sun, 20 Sep 2015 13:09:46 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=36 Finally finished a first draft of the full specification! https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=33 <div><strong>Rev 33 - dgisselq</strong> (2 file(s) modified)</div><div>Finally finished a first draft of the full specification!</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br /> dgisselq Sat, 22 Aug 2015 19:58:31 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=33 Updated the document to match the most recent changes to ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=32 <div><strong>Rev 32 - dgisselq</strong> (2 file(s) modified)</div><div>Updated the document to match the most recent changes to ...</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br /> dgisselq Sat, 22 Aug 2015 12:13:40 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=32 Lots more changes to the spec. It's still not ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=24 <div><strong>Rev 24 - dgisselq</strong> (3 file(s) modified)</div><div>Lots more changes to the spec. It's still not ...</div>~ /zipcpu/trunk/doc/Makefile<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br /> dgisselq Wed, 19 Aug 2015 11:25:58 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=24 Oops -- left some portions of the RTC Clock spec ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=23 <div><strong>Rev 23 - dgisselq</strong> (2 file(s) modified)</div><div>Oops -- left some portions of the RTC Clock spec ...</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br /> dgisselq Mon, 17 Aug 2015 15:37:47 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=23 This update adds an incomplete version of the specification for ... https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=21 <div><strong>Rev 21 - dgisselq</strong> (8 file(s) modified)</div><div>This update adds an incomplete version of the specification for ...</div>+ /zipcpu/trunk/doc/gpl-3.0.pdf<br />+ /zipcpu/trunk/doc/Makefile<br />+ /zipcpu/trunk/doc/spec.pdf<br />+ /zipcpu/trunk/doc/src<br />+ /zipcpu/trunk/doc/src/gpl-3.0.tex<br />+ /zipcpu/trunk/doc/src/gqtekspec.cls<br />+ /zipcpu/trunk/doc/src/GT.eps<br />+ /zipcpu/trunk/doc/src/spec.tex<br /> dgisselq Mon, 17 Aug 2015 15:35:25 +0100 https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2F&rev=21
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