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zipcpu
WebSVN RSS feed - zipcpu
https://opencores.org/websvn//websvn/listing?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2Fspec.tex&
Thu, 28 Mar 2024 12:24:31 +0100
FeedCreator 1.7.2
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8b bytes, + formal verification throughout + dcache
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=209
<div><strong>Rev 209 - dgisselq</strong> (129 file(s) modified)</div><div>8b bytes, + formal verification throughout + dcache</div>+ /zipcpu/trunk/.gitignore<br />~ /zipcpu/trunk/bench/asm/Makefile<br />~ /zipcpu/trunk/bench/asm/zipdhry.S<br />~ /zipcpu/trunk/bench/cpp/helloworld.c<br />~ /zipcpu/trunk/bench/cpp/Makefile<br />+ /zipcpu/trunk/bench/cpp/README.md<br />+ /zipcpu/trunk/bench/formal<br />+ /zipcpu/trunk/bench/formal/.gitignore<br />+ /zipcpu/trunk/bench/formal/abs_div.v<br />+ /zipcpu/trunk/bench/formal/abs_mpy.v<br />+ /zipcpu/trunk/bench/formal/abs_prefetch.v<br />+ /zipcpu/trunk/bench/formal/busdelay.sby<br />+ /zipcpu/trunk/bench/formal/cpuops.sby<br />+ /zipcpu/trunk/bench/formal/dblfetch.sby<br />+ /zipcpu/trunk/bench/formal/dcache.gtkw<br />+ /zipcpu/trunk/bench/formal/dcache.sby<br />+ /zipcpu/trunk/bench/formal/div.gtkw<br />+ /zipcpu/trunk/bench/formal/div.sby<br />+ /zipcpu/trunk/bench/formal/f_idecode.v<br />+ /zipcpu/trunk/bench/formal/icontrol.sby<br />+ /zipcpu/trunk/bench/formal/idecode.gtkw<br />+ /zipcpu/trunk/bench/formal/idecode.sby<br />+ /zipcpu/trunk/bench/formal/Makefile<br />+ /zipcpu/trunk/bench/formal/mcve.sby<br />+ /zipcpu/trunk/bench/formal/mcve.v<br />+ /zipcpu/trunk/bench/formal/memops.sby<br />+ /zipcpu/trunk/bench/formal/pfcache.gtkw<br />+ /zipcpu/trunk/bench/formal/pfcache.sby<br />+ /zipcpu/trunk/bench/formal/pipemem.sby<br />+ /zipcpu/trunk/bench/formal/prefetch.sby<br />+ /zipcpu/trunk/bench/formal/wbdblpriarb.sby<br />+ /zipcpu/trunk/bench/formal/wbdmac.sby<br />+ /zipcpu/trunk/bench/formal/wbpriarbiter.sby<br />+ /zipcpu/trunk/bench/formal/wbwatchdog.sby<br />+ /zipcpu/trunk/bench/formal/zipcounter.sby<br />+ /zipcpu/trunk/bench/formal/zipcpu.gtkw<br />+ /zipcpu/trunk/bench/formal/zipcpu.sby<br />+ /zipcpu/trunk/bench/formal/zipjiffies.sby<br />+ /zipcpu/trunk/bench/formal/zipmmu.gtkw<br />+ /zipcpu/trunk/bench/formal/zipmmu.sby<br />+ /zipcpu/trunk/bench/formal/ziptimer.sby<br />+ /zipcpu/trunk/bench/rtl<br />+ /zipcpu/trunk/bench/rtl/Makefile<br />+ /zipcpu/trunk/bench/rtl/memdev.v<br />+ /zipcpu/trunk/bench/rtl/zipmmu_tb.v<br />+ /zipcpu/trunk/doc/.gitignore<br />+ /zipcpu/trunk/doc/gfx/.gitignore<br />~ /zipcpu/trunk/doc/gfx/cpu.dia<br />~ /zipcpu/trunk/doc/nextgen.html<br />~ /zipcpu/trunk/doc/orconf.pdf<br />+ /zipcpu/trunk/doc/orconf2017.pdf<br />+ /zipcpu/trunk/doc/orconf2018.pdf<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />~ /zipcpu/trunk/INSTALL.md<br />~ /zipcpu/trunk/Makefile<br />~ /zipcpu/trunk/README.md<br />~ /zipcpu/trunk/rtl/core<br />~ /zipcpu/trunk/rtl/core/cpuops.v<br />~ /zipcpu/trunk/rtl/core/dblfetch.v<br />~ /zipcpu/trunk/rtl/core/dcache.v<br />~ /zipcpu/trunk/rtl/core/div.v<br />~ /zipcpu/trunk/rtl/core/idecode.v<br />+ /zipcpu/trunk/rtl/core/iscachable.v<br />~ /zipcpu/trunk/rtl/core/memops.v<br />+ /zipcpu/trunk/rtl/core/mpyop.v<br />~ /zipcpu/trunk/rtl/core/pfcache.v<br />~ /zipcpu/trunk/rtl/core/pipefetch.v<br />~ /zipcpu/trunk/rtl/core/pipemem.v<br />~ /zipcpu/trunk/rtl/core/prefetch.v<br />+ /zipcpu/trunk/rtl/core/README.md<br />+ /zipcpu/trunk/rtl/core/slowmpy.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/cpudefs.v<br />+ /zipcpu/trunk/rtl/ex<br />+ /zipcpu/trunk/rtl/ex/busdelay.v<br />+ /zipcpu/trunk/rtl/ex/fwb_counter.v<br />+ /zipcpu/trunk/rtl/ex/fwb_master.v<br />+ /zipcpu/trunk/rtl/ex/fwb_slave.v<br />+ /zipcpu/trunk/rtl/ex/wbarbiter.v<br />+ /zipcpu/trunk/rtl/ex/wbdblpriarb.v<br />+ /zipcpu/trunk/rtl/ex/wbpriarbiter.v<br />~ /zipcpu/trunk/rtl/Makefile<br />~ /zipcpu/trunk/rtl/peripherals/icontrol.v<br />+ /zipcpu/trunk/rtl/peripherals/README.md<br />~ /zipcpu/trunk/rtl/peripherals/wbdmac.v<br />~ /zipcpu/trunk/rtl/peripherals/wbwatchdog.v<br />~ /zipcpu/trunk/rtl/peripherals/zipcounter.v<br />~ /zipcpu/trunk/rtl/peripherals/zipjiffies.v<br />~ /zipcpu/trunk/rtl/peripherals/zipmmu.v<br />~ /zipcpu/trunk/rtl/peripherals/ziptimer.v<br />+ /zipcpu/trunk/rtl/README.md<br />~ /zipcpu/trunk/rtl/zipbones.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />~ /zipcpu/trunk/sim/cpp<br />~ /zipcpu/trunk/sim/cpp/Makefile<br />+ /zipcpu/trunk/sim/cpp/README.md<br />~ /zipcpu/trunk/sim/cpp/twoc.cpp<br />~ /zipcpu/trunk/sim/cpp/twoc.h<br />~ /zipcpu/trunk/sim/cpp/zipelf.cpp<br />~ /zipcpu/trunk/sim/cpp/zipelf.h<br />~ /zipcpu/trunk/sim/cpp/zsim.cpp<br />~ /zipcpu/trunk/sim/verilator<br />~ /zipcpu/trunk/sim/verilator/.gitignore<br />~ /zipcpu/trunk/sim/verilator/div_tb.cpp<br />~ /zipcpu/trunk/sim/verilator/Makefile<br />~ /zipcpu/trunk/sim/verilator/memsim.h<br />~ /zipcpu/trunk/sim/verilator/mpy_tb.cpp<br />~ /zipcpu/trunk/sim/verilator/pdump.cpp<br />~ /zipcpu/trunk/sim/verilator/pfcache_tb.cpp<br />+ /zipcpu/trunk/sim/verilator/README.md<br />~ /zipcpu/trunk/sim/verilator/testb.h<br />~ /zipcpu/trunk/sim/verilator/twoc.cpp<br />~ /zipcpu/trunk/sim/verilator/twoc.h<br />+ /zipcpu/trunk/sim/verilator/vversion.sh<br />+ /zipcpu/trunk/sim/verilator/zipcpu_tb.cpp<br />~ /zipcpu/trunk/sim/verilator/zipmmu_tb.cpp<br />~ /zipcpu/trunk/sw<br />~ /zipcpu/trunk/sw/.gitignore<br />~ /zipcpu/trunk/sw/gas-script.sh<br />~ /zipcpu/trunk/sw/gas-zippatch.patch<br />~ /zipcpu/trunk/sw/gcc-script.sh<br />~ /zipcpu/trunk/sw/gcc-zippatch.patch<br />~ /zipcpu/trunk/sw/Makefile<br />~ /zipcpu/trunk/sw/nlib-script.sh<br />~ /zipcpu/trunk/sw/nlib-zippatch.patch<br />+ /zipcpu/trunk/sw/README.md<br />~ /zipcpu/trunk/sw/zasm<br />~ /zipcpu/trunk/sw/zasm/.gitignore<br />
dgisselq
Tue, 19 Mar 2019 03:24:12 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=209
-
Additional ZipCPU changes associated w 8b upgrade
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=202
<div><strong>Rev 202 - dgisselq</strong> (38 file(s) modified)</div><div>Additional ZipCPU changes associated w 8b upgrade</div>~ /zipcpu/trunk/bench/asm/cputest.c<br />~ /zipcpu/trunk/bench/asm/Makefile<br />~ /zipcpu/trunk/bench/asm/zipdhry.S<br />~ /zipcpu/trunk/bench/cpp/Makefile<br />~ /zipcpu/trunk/doc/gfx<br />+ /zipcpu/trunk/doc/gfx/bus-structure.eps<br />+ /zipcpu/trunk/doc/gfx/bus-structure.png<br />~ /zipcpu/trunk/doc/gfx/cpu.eps<br />+ /zipcpu/trunk/doc/gfx/zipbones.eps<br />- /zipcpu/trunk/doc/iset.html<br />~ /zipcpu/trunk/doc/Makefile<br />+ /zipcpu/trunk/doc/memsurvey.png<br />+ /zipcpu/trunk/doc/nextgen.html<br />+ /zipcpu/trunk/doc/nextgen.png<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />~ /zipcpu/trunk/Makefile<br />~ /zipcpu/trunk/sw<br />+ /zipcpu/trunk/sw/.gitignore<br />- /zipcpu/trunk/sw/binutils-2.25.patch<br />- /zipcpu/trunk/sw/binutils-2.25.tar.bz2<br />+ /zipcpu/trunk/sw/binutils-2.27.tar.bz2<br />~ /zipcpu/trunk/sw/gas-script.sh<br />+ /zipcpu/trunk/sw/gas-zippatch.patch<br />+ /zipcpu/trunk/sw/gcc-6.2.0.tar.bz2<br />~ /zipcpu/trunk/sw/gcc-script.sh<br />~ /zipcpu/trunk/sw/gcc-zippatch.patch<br />~ /zipcpu/trunk/sw/Makefile<br />+ /zipcpu/trunk/sw/newlib-2.5.0.tar.gz<br />+ /zipcpu/trunk/sw/nlib-script.sh<br />+ /zipcpu/trunk/sw/nlib-zippatch.patch<br />~ /zipcpu/trunk/sw/zasm<br />+ /zipcpu/trunk/sw/zasm/.gitignore<br />- /zipcpu/trunk/sw/zasm/obj-pc<br />+ /zipcpu/trunk/sw/zasm/README.md<br />~ /zipcpu/trunk/sw/zasm/zopcodes.cpp<br />~ /zipcpu/trunk/sw/zasm/zopcodes.h<br />~ /zipcpu/trunk/zip.vim<br />
dgisselq
Thu, 09 Mar 2017 19:13:56 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=202
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Massive specification rewrite, brings it up to date with the ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=199
<div><strong>Rev 199 - dgisselq</strong> (2 file(s) modified)</div><div>Massive specification rewrite, brings it up to date with the ...</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />
dgisselq
Fri, 04 Nov 2016 22:53:44 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=199
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Updated the spec to reflect changes in the CC register: ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=167
<div><strong>Rev 167 - dgisselq</strong> (2 file(s) modified)</div><div>Updated the spec to reflect changes in the CC register: ...</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />
dgisselq
Sat, 16 Jul 2016 20:25:05 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=167
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Changes necessary to document the changed instruction set: LDIHI became ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=139
<div><strong>Rev 139 - dgisselq</strong> (2 file(s) modified)</div><div>Changes necessary to document the changed instruction set: LDIHI became ...</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />
dgisselq
Fri, 06 May 2016 15:01:59 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=139
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Adjustments made to match the simplified early branching.
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=92
<div><strong>Rev 92 - dgisselq</strong> (2 file(s) modified)</div><div>Adjustments made to match the simplified early branching.</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />
dgisselq
Thu, 28 Jan 2016 22:10:42 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=92
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Documentations updates.
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=73
<div><strong>Rev 73 - dgisselq</strong> (3 file(s) modified)</div><div>Documentations updates.</div>~ /zipcpu/trunk/doc/iset.html<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />
dgisselq
Mon, 28 Dec 2015 20:39:21 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=73
-
This implements the "new Instruction Set" architecture for the Zip ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=69
<div><strong>Rev 69 - dgisselq</strong> (85 file(s) modified)</div><div>This implements the "new Instruction Set" architecture for the Zip ...</div>~ /zipcpu/trunk/bench/asm/helloworld.S<br />~ /zipcpu/trunk/bench/asm/ivec.S<br />~ /zipcpu/trunk/bench/asm/lodsto.S<br />~ /zipcpu/trunk/bench/asm/Makefile<br />~ /zipcpu/trunk/bench/asm/pcpc.S<br />~ /zipcpu/trunk/bench/asm/testdiv.S<br />~ /zipcpu/trunk/bench/asm/wdt.S<br />~ /zipcpu/trunk/bench/asm/zipdhry.S<br />~ /zipcpu/trunk/bench/cpp/Makefile<br />~ /zipcpu/trunk/bench/cpp/memsim.cpp<br />~ /zipcpu/trunk/bench/cpp/memsim.h<br />~ /zipcpu/trunk/bench/cpp/pdump.cpp<br />~ /zipcpu/trunk/bench/cpp/testb.h<br />~ /zipcpu/trunk/bench/cpp/twoc.cpp<br />~ /zipcpu/trunk/bench/cpp/twoc.h<br />~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />~ /zipcpu/trunk/doc/gfx/bc.eps<br />~ /zipcpu/trunk/doc/gfx/bra.eps<br />~ /zipcpu/trunk/doc/gfx/cpu.dia<br />~ /zipcpu/trunk/doc/gfx/cpu.eps<br />~ /zipcpu/trunk/doc/gfx/cpu.png<br />~ /zipcpu/trunk/doc/gfx/memrd.eps<br />~ /zipcpu/trunk/doc/gfx/memwr.eps<br />~ /zipcpu/trunk/doc/gfx/regset.png<br />~ /zipcpu/trunk/doc/gfx/system.dia<br />~ /zipcpu/trunk/doc/gfx/system.eps<br />~ /zipcpu/trunk/doc/gfx/system.png<br />~ /zipcpu/trunk/doc/gfx/zipbones.dia<br />~ /zipcpu/trunk/doc/gfx/zipbones.png<br />~ /zipcpu/trunk/doc/iset.html<br />~ /zipcpu/trunk/doc/Makefile<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />~ /zipcpu/trunk/Makefile<br />~ /zipcpu/trunk/rtl/aux/busdelay.v<br />~ /zipcpu/trunk/rtl/aux/wbarbiter.v<br />~ /zipcpu/trunk/rtl/aux/wbdblpriarb.v<br />~ /zipcpu/trunk/rtl/aux/wbpriarbiter.v<br />~ /zipcpu/trunk/rtl/core/cpuops.v<br />+ /zipcpu/trunk/rtl/core/cpuops_deprecated.v<br />+ /zipcpu/trunk/rtl/core/div.v<br />+ /zipcpu/trunk/rtl/core/idecode.v<br />+ /zipcpu/trunk/rtl/core/idecode_deprecated.v<br />~ /zipcpu/trunk/rtl/core/memops.v<br />+ /zipcpu/trunk/rtl/core/pfcache.v<br />~ /zipcpu/trunk/rtl/core/pipefetch.v<br />~ /zipcpu/trunk/rtl/core/pipemem.v<br />~ /zipcpu/trunk/rtl/core/prefetch.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/cpudefs.v<br />~ /zipcpu/trunk/rtl/Makefile<br />~ /zipcpu/trunk/rtl/peripherals/flashcache.v<br />~ /zipcpu/trunk/rtl/peripherals/icontrol.v<br />~ /zipcpu/trunk/rtl/peripherals/wbdmac.v<br />+ /zipcpu/trunk/rtl/peripherals/wbwatchdog.v<br />~ /zipcpu/trunk/rtl/peripherals/zipcounter.v<br />~ /zipcpu/trunk/rtl/peripherals/zipjiffies.v<br />~ /zipcpu/trunk/rtl/peripherals/ziptimer.v<br />~ /zipcpu/trunk/rtl/peripherals/ziptrap.v<br />~ /zipcpu/trunk/rtl/zipbones.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />~ /zipcpu/trunk/sw/lib/divs.S<br />~ /zipcpu/trunk/sw/lib/divu.S<br />~ /zipcpu/trunk/sw/lib/mpy32s.S<br />~ /zipcpu/trunk/sw/lib/mpy32u.S<br />~ /zipcpu/trunk/sw/zasm/asmdata.cpp<br />~ /zipcpu/trunk/sw/zasm/asmdata.h<br />~ /zipcpu/trunk/sw/zasm/Makefile<br />~ /zipcpu/trunk/sw/zasm/optest.cpp<br />~ /zipcpu/trunk/sw/zasm/sys.i<br />~ /zipcpu/trunk/sw/zasm/test.S<br />~ /zipcpu/trunk/sw/zasm/twoc.cpp<br />~ /zipcpu/trunk/sw/zasm/twoc.h<br />~ /zipcpu/trunk/sw/zasm/zasm.l<br />~ /zipcpu/trunk/sw/zasm/zasm.y<br />~ /zipcpu/trunk/sw/zasm/zdump.cpp<br />~ /zipcpu/trunk/sw/zasm/zopcodes.cpp<br />~ /zipcpu/trunk/sw/zasm/zopcodes.h<br />~ /zipcpu/trunk/sw/zasm/zparser.cpp<br />~ /zipcpu/trunk/sw/zasm/zparser.h<br />~ /zipcpu/trunk/sw/zasm/zpp.l<br />~ /zipcpu/trunk/sw/zipdbg/devbus.h<br />~ /zipcpu/trunk/sw/zipdbg/regdefs.h<br />~ /zipcpu/trunk/sw/zipdbg/zipdbg.cpp<br />+ /zipcpu/trunk/zip.vim<br />
dgisselq
Tue, 22 Dec 2015 16:06:51 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=69
-
Updated specification, includes well illustrated pipeline discussion.
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=68
<div><strong>Rev 68 - dgisselq</strong> (3 file(s) modified)</div><div>Updated specification, includes well illustrated pipeline discussion.</div>~ /zipcpu/trunk/doc/Makefile<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />
dgisselq
Tue, 17 Nov 2015 15:44:50 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=68
-
Here's the documentation update to support the pipelined read/writes of
the ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=39
<div><strong>Rev 39 - dgisselq</strong> (5 file(s) modified)</div><div>Here's the documentation update to support the pipelined read/writes of<br />
the ...</div>~ /zipcpu/trunk/bench/cpp/Makefile<br />~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />~ /zipcpu/trunk/sw/zasm/test.S<br />
dgisselq
Tue, 29 Sep 2015 18:48:13 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=39
-
Fixed some minor spelling errors.
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=37
<div><strong>Rev 37 - dgisselq</strong> (2 file(s) modified)</div><div>Fixed some minor spelling errors.</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />
dgisselq
Mon, 21 Sep 2015 01:51:27 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=37
-
*Lots* of changes to increase processing speed and remove pipeline ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=36
<div><strong>Rev 36 - dgisselq</strong> (34 file(s) modified)</div><div>*Lots* of changes to increase processing speed and remove pipeline ...</div>+ /zipcpu/trunk/bench/asm/lfsrleds.S<br />~ /zipcpu/trunk/bench/asm/lodsto.S<br />~ /zipcpu/trunk/bench/cpp/Makefile<br />~ /zipcpu/trunk/bench/cpp/memsim.cpp<br />~ /zipcpu/trunk/bench/cpp/memsim.h<br />~ /zipcpu/trunk/bench/cpp/testb.h<br />~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />+ /zipcpu/trunk/doc/gfx/zippipe.dia<br />~ /zipcpu/trunk/doc/Makefile<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />~ /zipcpu/trunk/Makefile<br />~ /zipcpu/trunk/rtl/aux/busdelay.v<br />~ /zipcpu/trunk/rtl/aux/wbarbiter.v<br />+ /zipcpu/trunk/rtl/aux/wbdblpriarb.v<br />+ /zipcpu/trunk/rtl/aux/wbpriarbiter.v<br />~ /zipcpu/trunk/rtl/core/memops.v<br />~ /zipcpu/trunk/rtl/core/pipefetch.v<br />~ /zipcpu/trunk/rtl/core/prefetch.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/Makefile<br />+ /zipcpu/trunk/rtl/peripherals/wbdmac.v<br />+ /zipcpu/trunk/rtl/peripherals/zipport.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />+ /zipcpu/trunk/sw/lib<br />+ /zipcpu/trunk/sw/lib/divs.S<br />+ /zipcpu/trunk/sw/lib/divu.S<br />+ /zipcpu/trunk/sw/lib/mpy32s.S<br />+ /zipcpu/trunk/sw/lib/mpy32u.S<br />~ /zipcpu/trunk/sw/zasm/asmdata.cpp<br />~ /zipcpu/trunk/sw/zasm/sys.i<br />~ /zipcpu/trunk/sw/zasm/test.S<br />~ /zipcpu/trunk/sw/zasm/zasm.y<br />~ /zipcpu/trunk/sw/zasm/zpp.l<br />
dgisselq
Sun, 20 Sep 2015 13:09:46 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=36
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Finally finished a first draft of the full specification!
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=33
<div><strong>Rev 33 - dgisselq</strong> (2 file(s) modified)</div><div>Finally finished a first draft of the full specification!</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />
dgisselq
Sat, 22 Aug 2015 19:58:31 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=33
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Updated the document to match the most recent changes to ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=32
<div><strong>Rev 32 - dgisselq</strong> (2 file(s) modified)</div><div>Updated the document to match the most recent changes to ...</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />
dgisselq
Sat, 22 Aug 2015 12:13:40 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=32
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Lots more changes to the spec. It's still not ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=24
<div><strong>Rev 24 - dgisselq</strong> (3 file(s) modified)</div><div>Lots more changes to the spec. It's still not ...</div>~ /zipcpu/trunk/doc/Makefile<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />
dgisselq
Wed, 19 Aug 2015 11:25:58 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=24
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Oops -- left some portions of the RTC Clock spec ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=23
<div><strong>Rev 23 - dgisselq</strong> (2 file(s) modified)</div><div>Oops -- left some portions of the RTC Clock spec ...</div>~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />
dgisselq
Mon, 17 Aug 2015 15:37:47 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=23
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...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=22
<div><strong>Rev 22 - dgisselq</strong> (1 file(s) modified)</div><div>...</div>~ /zipcpu/trunk/doc/src/spec.tex<br />
dgisselq
Mon, 17 Aug 2015 15:36:30 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=22
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This update adds an incomplete version of the specification for ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=21
<div><strong>Rev 21 - dgisselq</strong> (8 file(s) modified)</div><div>This update adds an incomplete version of the specification for ...</div>+ /zipcpu/trunk/doc/gpl-3.0.pdf<br />+ /zipcpu/trunk/doc/Makefile<br />+ /zipcpu/trunk/doc/spec.pdf<br />+ /zipcpu/trunk/doc/src<br />+ /zipcpu/trunk/doc/src/gpl-3.0.tex<br />+ /zipcpu/trunk/doc/src/gqtekspec.cls<br />+ /zipcpu/trunk/doc/src/GT.eps<br />+ /zipcpu/trunk/doc/src/spec.tex<br />
dgisselq
Mon, 17 Aug 2015 15:35:25 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Fdoc%2Fsrc%2F&rev=21
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