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zipcpu
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https://opencores.org/websvn//websvn/listing?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&
Thu, 28 Mar 2024 10:49:39 +0100
FeedCreator 1.7.2
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Here's a bit of work in progress for getting the ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=56
<div><strong>Rev 56 - dgisselq</strong> (10 file(s) modified)</div><div>Here's a bit of work in progress for getting the ...</div>~ /zipcpu/trunk/rtl/aux/wbpriarbiter.v<br />~ /zipcpu/trunk/rtl/core/cpuops.v<br />~ /zipcpu/trunk/rtl/core/pipefetch.v<br />~ /zipcpu/trunk/rtl/core/pipemem.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />+ /zipcpu/trunk/rtl/cpudefs.v<br />~ /zipcpu/trunk/rtl/Makefile<br />~ /zipcpu/trunk/rtl/peripherals/ziptimer.v<br />~ /zipcpu/trunk/rtl/zipbones.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />
dgisselq
Mon, 12 Oct 2015 13:26:05 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=56
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Final set of changes finishing the Dhrystone package. Dhrystone, ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=49
<div><strong>Rev 49 - dgisselq</strong> (4 file(s) modified)</div><div>Final set of changes finishing the Dhrystone package. Dhrystone, ...</div>+ /zipcpu/trunk/doc/gfx/zipbones.dia<br />+ /zipcpu/trunk/doc/gfx/zipbones.png<br />~ /zipcpu/trunk/Makefile<br />+ /zipcpu/trunk/rtl/core/pipemem.v<br />
dgisselq
Fri, 02 Oct 2015 21:50:03 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=49
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Files added/updated to get Dhrystone benchmark to work. Several ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=48
<div><strong>Rev 48 - dgisselq</strong> (9 file(s) modified)</div><div>Files added/updated to get Dhrystone benchmark to work. Several ...</div>~ /zipcpu/trunk/rtl/core/memops.v<br />~ /zipcpu/trunk/rtl/core/pipefetch.v<br />- /zipcpu/trunk/rtl/core/pipemem.v<br />~ /zipcpu/trunk/rtl/core/prefetch.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/peripherals/wbdmac.v<br />- /zipcpu/trunk/rtl/peripherals/zipport.v<br />~ /zipcpu/trunk/rtl/zipbones.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />
dgisselq
Fri, 02 Oct 2015 21:48:41 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=48
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A couple of quick updates:
- The Zip CPU now supports ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=38
<div><strong>Rev 38 - dgisselq</strong> (6 file(s) modified)</div><div>A couple of quick updates:<br />
<br />
- The Zip CPU now supports ...</div>~ /zipcpu/trunk/rtl/core/pipefetch.v<br />+ /zipcpu/trunk/rtl/core/pipemem.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/Makefile<br />+ /zipcpu/trunk/rtl/zipbones.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />
dgisselq
Tue, 29 Sep 2015 16:38:09 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=38
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*Lots* of changes to increase processing speed and remove pipeline ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=36
<div><strong>Rev 36 - dgisselq</strong> (34 file(s) modified)</div><div>*Lots* of changes to increase processing speed and remove pipeline ...</div>+ /zipcpu/trunk/bench/asm/lfsrleds.S<br />~ /zipcpu/trunk/bench/asm/lodsto.S<br />~ /zipcpu/trunk/bench/cpp/Makefile<br />~ /zipcpu/trunk/bench/cpp/memsim.cpp<br />~ /zipcpu/trunk/bench/cpp/memsim.h<br />~ /zipcpu/trunk/bench/cpp/testb.h<br />~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />+ /zipcpu/trunk/doc/gfx/zippipe.dia<br />~ /zipcpu/trunk/doc/Makefile<br />~ /zipcpu/trunk/doc/spec.pdf<br />~ /zipcpu/trunk/doc/src/spec.tex<br />~ /zipcpu/trunk/Makefile<br />~ /zipcpu/trunk/rtl/aux/busdelay.v<br />~ /zipcpu/trunk/rtl/aux/wbarbiter.v<br />+ /zipcpu/trunk/rtl/aux/wbdblpriarb.v<br />+ /zipcpu/trunk/rtl/aux/wbpriarbiter.v<br />~ /zipcpu/trunk/rtl/core/memops.v<br />~ /zipcpu/trunk/rtl/core/pipefetch.v<br />~ /zipcpu/trunk/rtl/core/prefetch.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/Makefile<br />+ /zipcpu/trunk/rtl/peripherals/wbdmac.v<br />+ /zipcpu/trunk/rtl/peripherals/zipport.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />+ /zipcpu/trunk/sw/lib<br />+ /zipcpu/trunk/sw/lib/divs.S<br />+ /zipcpu/trunk/sw/lib/divu.S<br />+ /zipcpu/trunk/sw/lib/mpy32s.S<br />+ /zipcpu/trunk/sw/lib/mpy32u.S<br />~ /zipcpu/trunk/sw/zasm/asmdata.cpp<br />~ /zipcpu/trunk/sw/zasm/sys.i<br />~ /zipcpu/trunk/sw/zasm/test.S<br />~ /zipcpu/trunk/sw/zasm/zasm.y<br />~ /zipcpu/trunk/sw/zasm/zpp.l<br />
dgisselq
Sun, 20 Sep 2015 13:09:46 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=36
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Bunches of changes, although very little changed with the core ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=34
<div><strong>Rev 34 - dgisselq</strong> (11 file(s) modified)</div><div>Bunches of changes, although very little changed with the core ...</div>~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />~ /zipcpu/trunk/rtl/aux/busdelay.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />~ /zipcpu/trunk/sw/zasm/asmdata.cpp<br />~ /zipcpu/trunk/sw/zasm/Makefile<br />~ /zipcpu/trunk/sw/zasm/sys.i<br />~ /zipcpu/trunk/sw/zasm/test.S<br />~ /zipcpu/trunk/sw/zasm/zasm.l<br />~ /zipcpu/trunk/sw/zasm/zasm.y<br />~ /zipcpu/trunk/sw/zasm/zpp.l<br />
dgisselq
Tue, 25 Aug 2015 18:29:20 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=34
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Here's a 20% increase in performance: We've gone from 0.44 ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=30
<div><strong>Rev 30 - dgisselq</strong> (1 file(s) modified)</div><div>Here's a 20% increase in performance: We've gone from 0.44 ...</div>~ /zipcpu/trunk/rtl/core/zipcpu.v<br />
dgisselq
Sat, 22 Aug 2015 10:51:30 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=30
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Lots of changes, hopefully all for the better. The ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=25
<div><strong>Rev 25 - dgisselq</strong> (3 file(s) modified)</div><div>Lots of changes, hopefully all for the better. The ...</div>~ /zipcpu/trunk/rtl/core/cpuops.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />
dgisselq
Sat, 22 Aug 2015 00:49:58 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=25
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A couple of changes: Registers can now be changed via ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=18
<div><strong>Rev 18 - dgisselq</strong> (4 file(s) modified)</div><div>A couple of changes: Registers can now be changed via ...</div>~ /zipcpu/trunk/rtl/core/pipefetch.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/Makefile<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />
dgisselq
Sun, 16 Aug 2015 00:59:04 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=18
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Updated the core CPUOPS module to make certain that the ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=15
<div><strong>Rev 15 - dgisselq</strong> (2 file(s) modified)</div><div>Updated the core CPUOPS module to make certain that the ...</div>~ /zipcpu/trunk/rtl/aux/busdelay.v<br />~ /zipcpu/trunk/rtl/core/cpuops.v<br />
dgisselq
Wed, 12 Aug 2015 11:44:26 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=15
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Bunch of changes while trying to get a hello world ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=12
<div><strong>Rev 12 - dgisselq</strong> (4 file(s) modified)</div><div>Bunch of changes while trying to get a hello world ...</div>+ /zipcpu/trunk/bench/asm/helloworld.S<br />~ /zipcpu/trunk/rtl/core/cpuops.v<br />~ /zipcpu/trunk/sw/zasm/zdump.cpp<br />~ /zipcpu/trunk/sw/zasm/zparser.cpp<br />
dgisselq
Tue, 28 Jul 2015 20:12:12 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=12
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This version works on an FPGA!!!
(Or at least the wdt.S ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=11
<div><strong>Rev 11 - dgisselq</strong> (5 file(s) modified)</div><div>This version works on an FPGA!!!<br />
<br />
(Or at least the wdt.S ...</div>+ /zipcpu/trunk/bench/asm/lfsr.S<br />~ /zipcpu/trunk/bench/asm/wdt.S<br />~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />~ /zipcpu/trunk/rtl/core/pipefetch.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />
dgisselq
Tue, 28 Jul 2015 11:53:26 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=11
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This checkin is the result of a watchdog timer test, ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=9
<div><strong>Rev 9 - dgisselq</strong> (6 file(s) modified)</div><div>This checkin is the result of a watchdog timer test, ...</div>~ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/peripherals/zipjiffies.v<br />~ /zipcpu/trunk/rtl/peripherals/ziptimer.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />~ /zipcpu/trunk/sw/zasm/zparser.cpp<br />
dgisselq
Mon, 27 Jul 2015 22:31:51 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=9
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Rebuilt the pipefetch (instruction fetch/cache module) so that it will
let ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=3
<div><strong>Rev 3 - dgisselq</strong> (5 file(s) modified)</div><div>Rebuilt the pipefetch (instruction fetch/cache module) so that it will<br />
let ...</div>~ /zipcpu/trunk/rtl/core/cpuops.v<br />~ /zipcpu/trunk/rtl/core/memops.v<br />~ /zipcpu/trunk/rtl/core/pipefetch.v<br />~ /zipcpu/trunk/rtl/core/zipcpu.v<br />~ /zipcpu/trunk/rtl/zipsystem.v<br />
dgisselq
Mon, 27 Jul 2015 14:45:57 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=3
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An initial load. No promises of what works or ...
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=2
<div><strong>Rev 2 - dgisselq</strong> (58 file(s) modified)</div><div>An initial load. No promises of what works or ...</div>+ /zipcpu/trunk/bench<br />+ /zipcpu/trunk/bench/asm<br />+ /zipcpu/trunk/bench/asm/ivec.S<br />+ /zipcpu/trunk/bench/asm/lodsto.S<br />+ /zipcpu/trunk/bench/asm/pcpc.S<br />+ /zipcpu/trunk/bench/cpp<br />+ /zipcpu/trunk/bench/cpp/Makefile<br />+ /zipcpu/trunk/bench/cpp/memsim.cpp<br />+ /zipcpu/trunk/bench/cpp/memsim.h<br />+ /zipcpu/trunk/bench/cpp/testb.h<br />+ /zipcpu/trunk/bench/cpp/twoc.cpp<br />+ /zipcpu/trunk/bench/cpp/twoc.h<br />+ /zipcpu/trunk/bench/cpp/zippy_tb.cpp<br />+ /zipcpu/trunk/doc<br />+ /zipcpu/trunk/doc/gfx<br />+ /zipcpu/trunk/doc/gfx/cpu.dia<br />+ /zipcpu/trunk/doc/gfx/cpu.eps<br />+ /zipcpu/trunk/doc/gfx/cpu.png<br />+ /zipcpu/trunk/doc/gfx/iset.html<br />+ /zipcpu/trunk/doc/gfx/system.dia<br />+ /zipcpu/trunk/doc/gfx/system.eps<br />+ /zipcpu/trunk/doc/gfx/system.png<br />+ /zipcpu/trunk/doc/gfx/topng.sh<br />+ /zipcpu/trunk/rtl<br />+ /zipcpu/trunk/rtl/aux<br />+ /zipcpu/trunk/rtl/aux/busdelay.v<br />+ /zipcpu/trunk/rtl/aux/wbarbiter.v<br />+ /zipcpu/trunk/rtl/core<br />+ /zipcpu/trunk/rtl/core/cpuops.v<br />+ /zipcpu/trunk/rtl/core/memops.v<br />+ /zipcpu/trunk/rtl/core/pipefetch.v<br />+ /zipcpu/trunk/rtl/core/prefetch.v<br />+ /zipcpu/trunk/rtl/core/zipcpu.v<br />+ /zipcpu/trunk/rtl/Makefile<br />+ /zipcpu/trunk/rtl/peripherals<br />+ /zipcpu/trunk/rtl/peripherals/flashcache.v<br />+ /zipcpu/trunk/rtl/peripherals/icontrol.v<br />+ /zipcpu/trunk/rtl/peripherals/zipcounter.v<br />+ /zipcpu/trunk/rtl/peripherals/zipjiffies.v<br />+ /zipcpu/trunk/rtl/peripherals/ziptimer.v<br />+ /zipcpu/trunk/rtl/peripherals/ziptrap.v<br />+ /zipcpu/trunk/rtl/zipsystem.v<br />+ /zipcpu/trunk/sw<br />+ /zipcpu/trunk/sw/zasm<br />+ /zipcpu/trunk/sw/zasm/Makefile<br />+ /zipcpu/trunk/sw/zasm/obj-pc<br />+ /zipcpu/trunk/sw/zasm/obj-pc/depends.txt<br />+ /zipcpu/trunk/sw/zasm/optest.cpp<br />+ /zipcpu/trunk/sw/zasm/tags<br />+ /zipcpu/trunk/sw/zasm/test.S<br />+ /zipcpu/trunk/sw/zasm/twoc.cpp<br />+ /zipcpu/trunk/sw/zasm/twoc.h<br />+ /zipcpu/trunk/sw/zasm/zasm.cpp<br />+ /zipcpu/trunk/sw/zasm/zdump.cpp<br />+ /zipcpu/trunk/sw/zasm/zopcodes.cpp<br />+ /zipcpu/trunk/sw/zasm/zopcodes.h<br />+ /zipcpu/trunk/sw/zasm/zparser.cpp<br />+ /zipcpu/trunk/sw/zasm/zparser.h<br />
dgisselq
Sun, 26 Jul 2015 21:38:38 +0100
https://opencores.org/websvn//websvn/revision?repname=zipcpu&path=%2Fzipcpu%2Ftrunk%2Frtl%2Fcore%2F&rev=2
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