What is OpenCores?
![Globe](https://cdn.opencores.org/blue/globe.png)
The reference community for Free and Open Source gateware IP cores
Since 1999, OpenCores is the most prominent online community for the development of gateware IP (Intellectual Properties) Cores. It is the place where such cores are shared and promoted in the spirit of Free and Open Source collaboration.
The OpenCores portal hosts the source code for different digital gateware projects and supports the users’ community providing a platform for listing, presenting, and managing such projects; together with version control systems for sources management.
OpenCores is also the place where digital designers meet to showcase, promote, and talk about their passion and work. They do this through forums, news collectors, and much more!
Please join us!
Projects
![Cores](https://cdn.opencores.org/blue/module.png)
Browse all Projects (Cores)
Forum
![Forum](https://cdn.opencores.org/blue/forum.png)
Communicate in the forums
WebShop
![Shopping Cart](https://cdn.opencores.org/blue/shopping_cart.png)
Visit our Webshop
Professional support
We are the developers and maintainers of this website and community, but not only!
If you plan to use IP Cores from OpenCores in your next design and need support, or if you require professional advise on your next challenging IP Core development, don’t hesitate to contact us.
We are experts in gateware design and engineering based on the OpenCores technology, and have extensive experience in all parts of FPGA development.
Please visit Oliscience for further information and enquiries.
News
# Use Sigasi Studio with your Open Source projects **Sigasi supports the open source community. We already are contributing to the open source software...
✅ Objectives: Acquire signals from humidity sensors located on a porous surface, sunlight, air temperature and humidity. Compare the performance of at...
✅ Goals: Implementar un Sistema Embebido basado en #FPGA que lea datos preprocesados (.csv o .mat) almacenados en memoria Double Data Rate 3 Synchronous...
Last updated projects
- cpu6502_tc - R6502 Processor Soft Core with accurate timing
- MMIO I2C
- CBU Graduation Project
- Wupper: PCIe DMA Engine for Xilinx FPGAs
- Memory Polynomial Model for Digital Predistortion
- SUBLEQ eForth CPU
- Fault-Tolerant Microprocessor
- Fade - Light L3 Ethernet protocol for transmission of data from FPGA to embedded PC