by suresh, girija on 22-Dec-2009
Open Source for Hardware?
Jeremy Bennett, CEO, Embecosm
Open source is well established as a business model in the software world. Red Hat is now approaching the market capitalization of Sun Microsystems, while IBM, the worlds largest patent hold...
by Admin, OpenCores on 26-May-2009
Uploaded on authorSTREAM by jamilkhatib...
by Khatib, Jamil on 11-Feb-2009
Computational power can be improved by accushooting for up to 200GHz of an Intel core.
The processor is overloaded with this clock frequency and the time for a accu-calculation is measured.
Making prédictive delta-control design using System and C...
by Ebert, Wolfram on 11-Feb-2009
Verification of IP Core Based SoC’s
Anil Deshpande,
Hyderabad, India
Abstract :
With rapid strides in Semiconductor processing technologies, the density of transistors on the die is increasing in line with Moore’s law which in ...
by Deshpande, Anil on 20-Nov-2008
We encounter tables in a variety of situations in our everyday lives – at work, at school, at home, and in restaurants, libraries, and other public venues. Enhancing traditional tables by adding computational functionality combines the collaborativ...
by Kumar, Naveen on 14-Nov-2008
Hello,
I am designing a peripheral using CY7C67300 EZ-Host/Peripheral controller in coprocessor mode with master as an external CPLD.
I have seen many examples using CY7C67300 in co-processor mode and as host but none with co-processor mode and...
by Shah, Hemal on 17-Jul-2008
As System-on-Chip (SoC) designs grow ever larger, design and verification flows are changing. A rich mix of features, increased software content, high intellectual property (IP) use and submicron implementation technology have semiconductor and syste...
by Senan, Kailas on 03-Jan-2008
Multiple, independent clocks are ubiquitous in system-on-chip (SoC) design. Most SoC devices have multiple interfaces, some following standards that use very different clock frequencies.
Many modern serial interfaces are inherently asynchronous fr...
by Senan, Kailas on 03-Jan-2008
Frequency analysis using the DFT, the DHT, the DCT or the DST is an obvious choice for signal processing domain. This paper describes the implementation of a DXT coprocessor of transform length '8' for the synchronous design in a 0.22 LM Flash-based ...
by Ebrahimi1980 on 16-Sep-2007
The home computer or the portable is broken down and the attempts at breakdown service failed: what to make?
The computer of the student son or family computer PC functions since months and the whole family is satisfied. But one fine day, the compu...
by Engrmoro on 03-Jul-2007
Fault Tolerant State Machine Design
Kaushal D. Buch
Abstract
Fault tolerant state machines are essential for implementation of highly reliable hardware in noisy or fault triggerable environments. Due to the external noise/energy the stat...
by D. Buch, Kaushal on 21-Apr-2007
iWave Systems, an expert in hand-held design solutions shares another success story by announcing it's latest i.MX27 reference design (iW-RainboW-G3) which has been conceptualised, designed and developed at its Bangalore center aimed at improving en...
by Iwavesystems on 19-Jan-2007
iWave Systems, a leading FPGA IP provider licences its 80186 IP Cores to companies developing FPGA products and to industries using 80186 processor. It is a boom to the industries which uses 16 bit, 80186 processor as the user need not change their...
by Iwavesystems on 19-Jan-2007
iWave Systems, a leading FPGA IP provider licences its 80186 IP Cores to companies developing FPGA products and to industries using 80186 processor. It is a boom to the industries which uses 16 bit, 80186 processor as the user need not change their s...
by Iwavesystems on 10-Jan-2007
Blue-Ray & HD-DVD
NEXT GENERATION DIGITAL DYNAMICS
Pravin Chopade
Bharati Vidyapeeth University
College of Engg. Pune 43,MS, India
pvchopade@gmail.com
Anil Rahate
Tech Mahindra- BT , UK
E-mail : anil.rahate@bt.com
Blue-ray Disc...
by Pravinvc on 14-Nov-2006
Decision Environment Improvement using Data Warehouse for Efficient Organizational Decisions - Making
Navneet Malhotra1 & Anjana Gosain2
School of Information Technology, GGSIP University Kashmiri Gate, New Delhi- 110006,
1 Email: malhotra_nixie...
by Malhotra_nixie8 on 02-May-2006
ABSTRACT
This paper describes Requirements and Interfaces for smart work processes in context rich environments. Smart work process4 is a work process that senses the environment which it performs in, adapts to relevant context or context c...
by Reena_152 on 20-Apr-2006
A fabless semiconductor startup focused on "multi-function video processing chips" has adopted Linux and an open-source RISC core. Vivace Semiconductor's roadmap, unveiled at a venture capital event today in San Francisco, includes a VSP200 chip targ...
by Lampret on 03-Mar-2006
I would like to propose a project. Being new to this forum I wanted to check and see if people felt it was appropriate and worthwhile.
Our company deals with the lithography simulation of final tape out. Therefore the back end of Design. There ...
by Texasjohn on 17-Feb-2006
i want project material on video compression on bindct
by Rahul_44 on 25-Nov-2005
i want project material on video compression on bindct
by Rahul_44 on 25-Nov-2005
I would like to know, how to down load a applicaton software in Xilinx virtex-4 device using Xilinx ISE 7.1i sp4. I used the iMPACT load the bit file onto the device, how do I load the application software? Your feedback will be appreicated.
by Selahi on 18-Oct-2005
Sir/Madam,
i have no idea about creating new project. as i am in the need of one project.i am the student of M.E. (VLSI Design). i am in the interset to know about the operation of reverse CDMA access controller.if u provide it i will know about it....
by Smrajan on 26-Sep-2005
I'm trying to integrate gdb/gcc under Eclipse/CDT. However, CDT uses the GDB/MI interface and gdb5.0 does not appear to support this interface even though 'gdb --help' indicates that it might. So my questions:-
- Has anyone been able to use Ecli...
by Stevebird on 05-Aug-2005
Is "open" hardware a disruptive technology that will foster the kind of collaboration that Linux brought to the software world?
Despite the recent demise of one prominent open-source programmable-logic effort, advocates think so. Given the increas...
by Khatib, Jamil on 13-Jun-2005
by Iqbal Khan
So, why should you use any O/R mapping tool? I am not talking about a specific tool but rather all O/R mapping tools in general. There are a number of reasons for using an O/R mapping tool but before I dive into that, let me give you ...
by Sarah on 25-Apr-2005
Asynchronous design is simple and can be done easily on FPGA designs. A demonstrator of an asynchronous version of the DLX processor has been shown at several conferences this year.
The demonstrator design was developed by the Asynchronous Circuit...
by Sotiriou on 27-Sep-2004
I would like to know which minimal xilinx FPGA to be used to implement the USB 2.0 function core.
Thank you
by Jinesh on 12-Sep-2004
Hi,
I would like to know as to what CRC bits are exactly sent after either the USB host or a USB device sends a zero length data packet.
Is it that all zeros are sent as CRC bits or is it the conventional "800D"?
Can anyone put light on this issue?
Thanks and regards.
Virendra
by Virendra_7 on 19-Jul-2004
Hey guys,
This is controller of Elevator (3 floors) working with Altera MAXPLUS II. With modelus as below:-
TOP.V
CASEXTEST.V
CONTROL.V
CONTROLPAR.V
COUNTFINAL.V
COUNTDFINALPAR.V
COUNTTEST.V
FORTEST.V
LIFTCOUNTER_BB.V
LIFTCOUNTER_INST.V
L...
by Nevil on 29-May-2004
At March, 24th, 2004
Tiny64 a simple 64-bit RICS microprocessor was uploaded to opencores.
The wordsize is configurable from 32-bit up to the FPGA limit,
the assembler is also wordsize aware ( see the testprograms ).
Note the unusual assembler sy...
by Riedel, Ulrich on 24-Mar-2004
Abstract
Programmable logic devices and Hardware Description Languages have made great impact on Hardware design methodology. The programmable logic designs are getting closer to software specially when Run time reconfiguration designs are conside...
by Khatib, Jamil on 20-Jan-2004
Abstract
The last few years witnessed very good improvements in the software industry and protocols. This was achieved by many programmers who made the source code of their SW available for everyone. HW designers are now trying to follow the same mo...
by Khatib, Jamil on 19-Jan-2004
"CD-ROMs compile open-source EDA, IP"
This is the title of an interesting article about OpenTech package. The OpenTech package is the only package in the world that provides free open source EDA tools and hardware designs.
To read the EEDesign ar...
by Khatib, Jamil on 16-Aug-2003
Version 1.0
Abstract
This paper deals with efficient handling of design projects leading to their successful completion not just their completion but completion on time with as little s...
by Solomon, John on 23-May-2003
Abstract: The Paper examines the prospect of using an opesource approach for developing and maintaining opensource FPGA Protocol Engines for Real-Time Control Networks. The success of opensource operating systems & software for PCs is a strong indica...
by Shaheen, Shehryar on 01-Apr-2003
INTRODUCTION:
This paper is the first one in the series of papers that lead to the design of RSA Crypto Chip using VHDL and as such can be used to understand RSA Algorithm. The first part lays down the foundation of RSA cryptosystem , all of it’s...
by Abhishek on 10-Mar-2003
Building a custom embedded SoC platform for embedded Linux
There are strong technical and business reasons to consider using Linux for your next embedded application project such as diverse hardware support, performance, scalability, high reliabil...
by Lampret on 16-Dec-2002
The persistent cache approach.
Boris Muratshin (zzeng@mail.ru),
Alexander Artiushin (alexnikart@mail.ru)
Jul 31, 2002
Ideally, memory should be able to supply a processor by data in
such a way of avoiding any extra data delay...
by Zzeng on 21-Oct-2002
Code generating for the architecture with ILP
Boris Muratshin (zzeng@mail.ru),
Alexander Artiushin (alexnikart@mail.ru)
May 5,
The original source of this page is placed in http://www.geocities.com/creta_ru/doc/
Contents
1 Introduction
...
by Zzeng on 29-May-2002
Explicitly Parallel RISC (EPRISC)
Here is an idea for extending the performance of RISC processors in the face of Explicitly Parallel Instruction Set Computers (EPIC).
The race is still on for increasing processor throughput by increasing...
by Tekhknowledge on 31-Mar-2002
I spent about 25 years of my working career either using, designing or testing general purpose processors, from mainframes to microprocessors. I recently had an opportunity to work on a networking chip and this is what I discovered about their...
by Tekhknowledge on 23-Mar-2002
LONDON — A clone of the ARM7 32-bit RISC processor core, previously available free for download from the Internet, has been taken down or hidden pending discussions between the core's designer and a Chinese representative of ARM Holdings plc (Cambr...
by Peter Clarke on 03-Nov-2001
LONDON — A clone of the ARM7 32-bit RISC processor core, previously available free for download from the Internet, has been taken down or hidden pending discussions between the core's designer and a Chinese representative of ARM Holdings plc (...
by Lampret on 03-Nov-2001