Plasma - most MIPS I(TM) opcodes

Hi,

I looked I your VHDL code source and find 2 RAM: Internal and External.

What is the aim of this two ram? is one for data and other for opcode?

Where the opcode start? How to indicate to the compiler for mapping the memory?

Thank you.

See the comments in plasma.h: #define RAM_INTERNAL_BASE 0x00000000 //8KB #define RAM_EXTERNAL_BASE 0x10000000 //1MB The 8KB internal RAM is used to hold a boot loader since the RAM contents are restored every time the FPGA is rebooted.

The Plasma CPU starts executing at address 0 in the internal RAM. To control where the code is loaded I just use the linker option "ld -Ttext 0x0" or "ld -Ttext 0x10000000". See tools/makefile which has targets count and count2.

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