Xilinx register bank :: Bugtracker

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Xilinx register bank

Information:
Type :: REQUEST
Status :: CLOSED
Assigned to :: Steve, Rhoads

Description:
I have a question about reg_file.

It needs too much space in FPGA.

I've heard xilinx FPGA has its memory block.

Is there any way to create reg_file in that section?

I'll wait for your answer

Comments:

Rhoads, Steve	Feb 15, 2004
I just discovered your question on opencores. The reg_bank.vhd file was recently changed based on feedback from a Xilinx user. Take a look at where memory_type = "DUAL_PORT_XILINX_XC4000XLA". You may need to modify it slightly if you are using a different part. Please let me know. Opencores didn't have this comment feature when I first joined opencores. I wonder if it send me an Email that I didn't notice when you submitted your question. Steve

Rhoads, Steve

Feb 15, 2004

I just discovered your question on opencores.
The reg_bank.vhd file was recently changed based on feedback from a Xilinx user. Take a look at where memory_type = "DUAL_PORT_XILINX_XC4000XLA". You may need to modify it slightly if you are using a different part. Please let me know.

Opencores didn't have this comment feature when I first joined opencores. I wonder if it send me an Email that I didn't notice when you submitted your question.

Steve

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Xilinx register bank