| Filename | Description | Downloads | Last modified |
|---|---|---|---|
| OR1200VectorDatapath.zip | Contribution by Kapil Anand & Shivam Gupta - how to add vector datapath to OR1200. | 1731 | Aug 17, 2009 |
| ahmed-code.tar.bz2 | The code developed by Waqas Ahmed for his Master's degree. It includes an innovative testbench based on OSCI SystemC TLM 2.0, which allows comparative testing of Or1ksim and OR1200 version 2 Verilog RTL, within an OVM framework. |
148 | Jun 23, 2010 |
| ahmed-dissertation.pdf | Implementation and Verification of a CPU Subsystem for Multimode RF Transceivers, Waqas Ahmed's Master's dissertation, which includes extensive comparative testing of Or1ksim and OR1200 Verilog. |
173 | Jun 23, 2010 |
| demo_or32_sw.zip | A simple application which will print a hello-world and echo the user's input via the UART. | 1333 | Oct 5, 2009 |
| or1200-rel1.tar.bz2 | OpenRISC OR1200 processor source code (verilog RTL), release 1. | 6936 | Aug 17, 2009 |
| or1ksim-0.4.0.pdf | User Guide for Or1ksim 0.4.0 stable release. |
241 | Jun 22, 2010 |
| or1ksim-0.4.0.tar.bz2 | Or1ksim 0.4.0 stable release source distribution. |
186 | Jun 22, 2010 |
| or32-gdb-6.8-patch-2.1.bz2 | GDB 6.8 for OpenRISC 1000, release 2.1 patch file. This fixes some type casting requirements so it will compile with GCC 4.1.3 under Ubuntu Linux. | 1206 | Aug 17, 2009 |