Hi OpenRISC users, I think its the right time to update the OpenRISC community on what is happening with the OpenRISC project. We are working on multiple items which we will soon release on OpenCores, see a short list below: - Ported Linux-2.6.23 and are currently testing it. - Updating "or1ksim" (arch-simulator). - Updating the toolchain-installation-scripts. - Updating ORP_SOC (reference design with testcases). - Adding USB to reference-design + Linux support. - Developed a USB-debug-cable with debug-software both for Linux & Windows. - Developed an FPGA-dev-board platform. Built on multiple boards that are mounted together via fixed-connectors. We have separated the FPGA-board and the IO board so that we easily & cost-efficient can redesign the IO board depending. Our mission/goal is to make the OpenRISC a worldclass "open source" 32-bit RISC processor aimed both for commercial companies as well as for non-commercial products. We are now calling for volunteers to help us both with the OpenRISC project, both with testing and developing. So if you would like to contribute please let us know at openrisc-team at opencores.org Regards, OpenRISC maintainers