Enabling SDHC on the new ordb2a-ep4ce22 board
by jb007 on Dec 28, 2011 |
jb007
Posts: 29 Joined: May 3, 2009 Last seen: Jun 29, 2020 |
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Hi All
I'm trying to enable the SDHC controller under Linux running on the ordb2a-ep4ce22 board. I'm very stuck; mainly because I'm a newbie, so could anyone give me pointers as how to go about this? TIA Jim |
RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by jb007 on Jan 3, 2012 |
jb007
Posts: 29 Joined: May 3, 2009 Last seen: Jun 29, 2020 |
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Hi all, me again. I thought that nobody had a reply for me, until I scouted around on the internet and found a reply from Yann Vernier on the 29 Dec 14:20 to my questions. Interestingly it's on this site http://comments.gmane.org/gmane.comp.hardware.openrisc/62 but not here on open cores forum. Why I don't know, any clues anybody?
Here is his reply: "On Tuesday, December 27, 2011 04:16:31 AM James Bartlett wrote: > I'm trying to enable the SDHC controller under Linux running on the > ordb2a-ep4ce22 board. I'm very stuck; mainly because I'm a newbie, so > could anyone give me pointers as to go about this? I've been working on this section for a while. The SD controller as currently published isn't quite generic enough for Linux MMC support, and I haven't found a driver for it. orpmon does support reading from it, but with rather fragile code. I have a u-boot driver which may be ported into Linux once it works. Currently it fails at a detection stage, trying to do a short 1-bit read of a configuration register via the data bus. The SD controller on opencores doesn't support either (1-bit or short block), but the one in the ordb2a internal repository has code for it (I intend to push it back once that works). On that note, really sorry about our backwards order! We were a bit rushed getting the ORDB2A out, and still need to submit the board port into the main orpsocv2 repository." Yann, thank you for your reply, and I hope you can get something going soon to allow the SDHC to work under Linux on this board. I'm willing to be a guinea pig if you want code tested! Cheers Jim |
RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by jb007 on Jan 22, 2012 |
jb007
Posts: 29 Joined: May 3, 2009 Last seen: Jun 29, 2020 |
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Yann, I was wondering if there was any further progress with the SDHC driver.
Jim |
RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by relinux on Feb 20, 2012 |
relinux
Posts: 4 Joined: Jul 11, 2011 Last seen: Mar 3, 2012 |
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Yann, I was wondering if there was any further progress with the SDHC driver.
I am, too. Is there at least a chance to boot Linux from the SD card automatically on power up?Jim The monitor program says in the help: sdboot [] - Read image from SD-CARD But I did not find out where to put the image. King regards Stephan |
RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by yannv on Feb 21, 2012 |
yannv
Posts: 20 Joined: Feb 6, 2009 Last seen: Jan 14, 2021 |
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Sorry it has taken so long. I haven't worked on the updated controller for a long while, but either that or the existing one does work to boot Linux (this is in fact how we test the micro-SD slot). ORPmon's sdboot command looks for a file named vmlinux.bin, which it loads, copies to address 0, and runs by jumping to 0x100 (the reset vector). The Linux kernel makefile has a rule for building this raw binary file.
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RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by rerdfh on Feb 21, 2012 |
rerdfh
Posts: 6 Joined: Jul 27, 2011 Last seen: Aug 2, 2012 |
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Hi,
this sounds interesting. I want to boot my Linux from sd-card as well. Here is what I tried: - Created a 15 mb fat16 (tried fat32 also) partition at the beginning of a 4gb microsdhc card - Set the "bootable" flag - Copied vmlinuz.bin to that partition (the file has been automatically created by "make ARCH=openrisc") - inserted the sd card into the ORSoC board Plugged the board in and opened a terminal: user@host-pc:~$ picocom --b 115200 --p n --d 8 --f xon /dev/ttyUSB2 picocom v1.4 (...) Terminal ready ORSoC devboard> sdboot Disabling data cache SD-BOOT start FAT INIT START ERROR - BUS ERROR (0x200) EPCR: 0x00016c9c Attemping to reset... ORSoC devboard monitor (type 'help' for help) build: Thu Dec 15 11:32:53 CET 2011 ORSoC devboard> So no luck ... what did I miss? |
RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by relinux on Feb 21, 2012 |
relinux
Posts: 4 Joined: Jul 11, 2011 Last seen: Mar 3, 2012 |
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I am trying, too. Result (after power cycle):
ORSoC devboard> sdboot Disabling data cache SD-BOOT start FAT INIT START SDC_HAL:sd reset SDC_HAL:sd reset SDC_HAL:sd reset SDC_HAL:sd reset SDC_HAL:sd reset SDC_HAL:sd reset SDC_HAL:sd reset SDC_HAL:sd reset SDC_HAL:sd reset SDC_HAL:sd reset SDC 2.0 card SDC_HAL:get cid SDC_HAL:CID: 0x1b534d30 SDC_HAL:get rca SDC_HAL:RCA 0x20500 SDC_HAL:Set up transfer SDC_HAL:Ready to transfer data! SDC_HAL:Set block size to 512 Succes, resp 0x900 SDC_HAL:Card Status reg ACMD6: 0x920 SDC_HAL:FREE BD TX/RX: 0x808 SDC_HAL:CARD in Transfer state SDC_HAL: readSector 0, block_addr 0 SDC_HAL:read sector 0 addr 0x31ab8 SDC_HAL:preFREE BD TX/RX: 0x808 SDC_HAL:postFREE BD TX/RX: 0x708 SDC_HAL: Data transfer succesful, rtn 1 active 0:0 1:3 2:3b 3:0 start 0:f7 1:0 2:0 3:0 size 0:9 1:d7 2:3c 3:0 Partition 0 start sector 0x000000F7 active 00 type 06 size 003CD709 SDC_HAL: readSector 247, block_addr 247 SDC_HAL:read sector 247 addr 0x31ab8 SDC_HAL:preFREE BD TX/RX: 0x808 SDC_HAL:postFREE BD TX/RX: 0x708 SDC_HAL:finFREE BD TX/RX: 0x708 repeated for ever Any idea? Kind regards Stephan |
RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by yannv on Feb 23, 2012 |
yannv
Posts: 20 Joined: Feb 6, 2009 Last seen: Jan 14, 2021 |
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The Bus Error indicates that the ORPSoC build loaded in that board is missing the SD controller; I'll have to check if it's enabled in the virtualbox image, but otherwise you could load the image we preload (available at ftp://ocuser:ocuser@openrisc.opencores.org/virtualbox-image/orpsoc.rbf ) or resynthesize with the SD controller enabled.
The second issue looks like orpmon either fails to read the filesystem, or just fails to read the card at all after reading the partition table. It is finicky; the combination we've had success with is Samsung 4GB cards (class 2 or 4, but that shouldn't matter), with one FAT16 formatted partition. Even then orpmon doesn't quite get it right as the volume label it displays is 4 bytes off, but it did load the kernel. |
RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by relinux on Feb 23, 2012 |
relinux
Posts: 4 Joined: Jul 11, 2011 Last seen: Mar 3, 2012 |
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Hi,
I did some more testing: The FPGA Image from the VM gives the BUS error mentioned above. Using the image available on the board I get the repeated "SDC_HAL:finFREE BD TX/RX: 0x708" message, even with no SD card in place. I also tried a fresh FAT16 formatted card with no success. Kind Regards Stephan |
RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by jb007 on Feb 25, 2012 |
jb007
Posts: 29 Joined: May 3, 2009 Last seen: Jun 29, 2020 |
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Hi all. I'm all ready to try the sdboot thing with a newly formated Fat16 bootable microSD card, but I'm not quite sure as to how to load Orpmon so I can run the sdboot command... can anyone give me a hands up on the commands to do this?
TIA Jim |
RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by jb007 on Feb 27, 2012 |
jb007
Posts: 29 Joined: May 3, 2009 Last seen: Jun 29, 2020 |
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OK, I figured out how to run the Orpmon command. What a baptism of fire this has been!
I had use the orpsoc.rdf file in the previous post to avoid the bus error. Can anyone tell me where to enable the SD controller in the code? Anyway here is what I get now. Jim ORSoC devboard> sdboot Disabling data cache SD-BOOT start FAT INIT START SDC 2.0 card active 0:80 1:20 2:21 3:0 start 0:0 1:8 2:0 3:0 size 0:0 1:80 2:0 3:0 Partition 0 start sector 0x00000800 active 80 type 06 size 00008000 Volume label 't FAT' 4 sector/s per cluster, 4 reserved sector/s, volume total 32768 sectors. 32 sectors per FAT, first FAT at sector #2052, root dir at #2116. (For FAT32, the root dir is a CLUSTER number, FAT12/16 it is a SECTOR number) 512 root dir entries, data area commences at sector #2148. 7655 clusters (15677440 bytes) in data area, filesystem IDd as FAT16. Compiled-in FDT at 0xc025f640 Linux version 3.1.0-rc6-00002-g0da8eb1-dirty (openrisc@Ubuntu) (gcc version 4.5.1-or32-1.0rc4 (OpenRISC 32-bit toolchain for or32-linux (built 20111017)) ) #34 Sun Feb 26 15:33:44 EST 2012 CPU: OpenRISC-12 (revision 8) @50 MHz -- dcache: 4096 bytes total, 16 bytes/line, 1 way(s) -- icache: 8192 bytes total, 16 bytes/line, 1 way(s) -- dmmu: 64 entries, 1 way(s) -- immu: 64 entries, 1 way(s) -- additional features: -- debug unit -- PIC -- timer setup_memory: Memory: 0x0-0x2000000 Reserved - 0x01ffda90-0x00002570 Setting up paging and PTEs. map_ram: Memory: 0x0-0x2000000 On node 0 totalpages: 4096 free_area_init_node: node 0, pgdat c0246200, node_mem_map c03c0000 Normal zone: 16 pages used for memmap Normal zone: 0 pages reserved Normal zone: 4080 pages, LIFO batch:0 dtlb_miss_handler c0002000 itlb_miss_handler c0002108 OpenRISC Linux -- http://openrisc.net pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768 pcpu-alloc: [0] 0 Built 1 zonelists in Zone order, mobility grouping off. Total pages: 4080 Kernel command line: console=uart,mmio,0x90000000,115200 Early serial console at MMIO 0x90000000 (options '115200') bootconsole [uart0] enabled PID hash table entries: 128 (order: -4, 512 bytes) Dentry cache hash table entries: 4096 (order: 1, 16384 bytes) Inode-cache hash table entries: 2048 (order: 0, 8192 bytes) Memory: 28696k/32768k available (2031k kernel code, 4072k reserved, 300k data, 1416k init, 0k highmem) mem_init_done ........................................... NR_IRQS:32 100.00 BogoMIPS (lpj=500000) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 1024 devtmpfs: initialized NET: Registered protocol family 16 Switching to clocksource openrisc_timer Switched to NOHz mode on CPU #0 NET: Registered protocol family 2 IP route cache hash table entries: 2048 (order: 0, 8192 bytes) TCP established hash table entries: 1024 (order: 0, 8192 bytes) TCP bind hash table entries: 1024 (order: -1, 4096 bytes) TCP: Hash tables configured (established 1024 bind 1024) TCP reno registered UDP hash table entries: 512 (order: 0, 8192 bytes) UDP-Lite hash table entries: 512 (order: 0, 8192 bytes) NET: Registered protocol family 1 RPC: Registered named UNIX socket transport module. RPC: Registered udp transport module. RPC: Registered tcp transport module. RPC: Registered tcp NFSv4.1 backchannel transport module. Unpacking initramfs Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled 90000000.serial: ttyS0 at MMIO 0x90000000 (irq = 2) is a 16550A console [ttyS0] enabled, bootconsole disabled console [ttyS0] enabled, bootconsole disabled ethoc-mdio: probed NET: Registered protocol family 17 Freeing unused kernel memory: 1416k freed init started: BusyBox v1.19.0.git (2011-02-16 08:10:12 CET) Configuring loopback device Please press Enter to activate this console. |
RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by rerdfh on Mar 8, 2012 |
rerdfh
Posts: 6 Joined: Jul 27, 2011 Last seen: Aug 2, 2012 |
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Hi there, no luck for me ...
I can't use the .rbf file from the mirror, because i already added i2c bus to my design (and i need that bus). In "soc-design/orpsocv2/boards/altera/ordb2a-ep4ce22/rtl/verilog/include/orpsoc-defines.v" the define "`define SDC_CONTROLLER" is set (it was already set, it was not set by me). But i still get the BUS error. Here is the rest of that config part: `ifdef CUSTOM_MODULES_CONFIG // Included modules: define to include `define JTAG_DEBUG `define VERSATILE_SDRAM //`define RAM_WB //`define ACTEL_UFR `define UART0 `define SPI0 `define SPI0_ASMI // `define SPI1 // `define SPI2 `define I2C0 // `define I2C1 // `define I2C2 // `define I2C3 `define USB0 // `define USB1 //`define GPIO0 `define ETH0 `define RMII // `define SMII0 `define SDC_CONTROLLER What else can i try? |
RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by stone11010 on Mar 27, 2012 |
stone11010
Posts: 5 Joined: Dec 16, 2011 Last seen: Dec 7, 2019 |
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I have try and it does work.But I don't know if the controller has IRQ.If so,which IRQ it was configured?Thank you!
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RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by jb007 on Mar 28, 2012 |
jb007
Posts: 29 Joined: May 3, 2009 Last seen: Jun 29, 2020 |
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I have try and it does work.But I don't know if the controller has IRQ.If so,which IRQ it was configured?Thank you!
Hi, not sure what you have got working? I'm wanting a Linux SD driver suitable for the SDHC card on the ordb2a board. Is this what you have got going? I've got the board booting Linux from the SD card, as per my previous post. Jim |
RE: Enabling SDHC on the new ordb2a-ep4ce22 board
by stone11010 on Apr 4, 2012 |
stone11010
Posts: 5 Joined: Dec 16, 2011 Last seen: Dec 7, 2019 |
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I have try and it does work.But I don't know if the controller has IRQ.If so,which IRQ it was configured?Thank you!
Hi, not sure what you have got working? I'm wanting a Linux SD driver suitable for the SDHC card on the ordb2a board. Is this what you have got going? I've got the board booting Linux from the SD card, as per my previous post. Jim It can boot linux with FAT or FAT32 filesystem.And I have test it's IRQ,IRQ 13(Normal IRQ),14(Command Error IRQ),15(Data IRQ);Now I am trying to Make it work on Linux,But I am now faced with some difficulties,such as how can i get card respones with 136bits responed data. |