Hi,

I have two boards : de0-nano and de2-115
I checked out the orpsoc for these boards from git://openrisc.net/stefan/orpsoc

In my de0-nano everything works fine. I can boot into linux and use the serial communication following these commands:

openocd -f de0-nano.cfg
or32-elf-gdb vmlinux --eval-command='target remote localhost:50001'
(gbg) load
(gdb) spr npc 0x100
(gdb) c
Continuing.

At this point, minicom console shows boot messages:
...
...
Please press Enter to activate this console.


On my de2-115 I tried this method described above but the serial console stops at:

...
init started: BusyBox v1.19.0.git (2011-02-16 08:10:12 CET)

I modified /etc/init.d/rcS using "echo" to trace execution. The last command executed was:
mount -o remount,rw /
after that, the execution stops
the output from serial terminal stops and I can't continue.

I tried u-boot but I don't know how to download linux image from u-boot into the board via serial console
u-boot command "loadb" didn't worked for me.

Has someone faced this problem in de2-115?

Could someone help me?
Thanks

I encountered the same problem.

Same here, did you find a solution or the reason of the problem?
thanks

For those who may be facing the same problem, here is a solution:
The problem is related to a phase shift of the sdram clock not being implemented, you need to change a few things in your orpsoc/boards/altera/de2-115/backend/rtl/verilog/pll.v

find and change these lines
altpll_component.clk0_multiply_by = 1,
altpll_component.clk0_phase_shift = "0",
to
altpll_component.clk0_multiply_by = 2,
altpll_component.clk0_phase_shift = "-1806",

I also changed these:
// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
to
// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "-1.80600000"
// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "ns"
and
// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1"
// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
to
// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "2"
// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "-1806"

but I guess those last ones aren't really necessary, I changed them only for precaution.

I guess that the de0-nano pll also needs those modifications, I think it only works because of the size of the circuit(?). Both de0-nano and de2-115 "Using_the_SDRAM" doc from altera, says that it is necessary to implement the phase shift.

besides that, note that the orpsoc only connects one of the 64 MB sdram chip of the board, so in your dts file remember to map only 64 MB and not 128 MB.

I am attaching the pll.v file for reference.

Nice catch!

I've taken your changes into my tree:
http://git.openrisc.net/cgit.cgi/stefan/orpsoc/commit/?id=192293d3ea08ebb826583d013ef2c67e7d7980f7