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| Interfacing a processor with USB 1.1 Host | 0 | 329 |
"Interfacing a processor with USB 1.1 Host"
by mesopotamia.scorpio Jun 19, 2011 |
| Found an unconnected output in Verilog IP CORE for USB 2.0 by Rudolf Usselmann | 0 | 609 |
"Found an unconnected output in Verilog IP CORE for USB 2.0 by Rudolf Usselmann"
by dixit_sethi Apr 20, 2011 |
| Ravi Chovatiya Low Speed Device Enumeration on Full Speed HUB | 20 | 664 |
"Low Speed Device Enumeration on Full Speed HUB "
by ravivlsiii Apr 15, 2011 |
| USB Host on DE2-70 board | 1 | 653 |
"RE: USB Host on DE2-70 board"
by richard_vlamynck Apr 15, 2011 |
| USB Host on DE2-70 board | 0 | 363 |
"USB Host on DE2-70 board"
by nightsjudge Apr 13, 2011 |
| Usb Controller sith DE2 | 1 | 619 |
"RE: Usb Controller sith DE2"
by richard_vlamynck Mar 24, 2011 |
| Rx error detection | 1 | 432 |
"RE: Rx error detection"
by Marcos325 Mar 8, 2011 |
| Rx Valid signal | 0 | 370 |
"Rx Valid signal"
by Harish_rtl_design Mar 8, 2011 |
| USB3.0 RxEqTraining | 0 | 593 |
"USB3.0 RxEqTraining"
by yyliu04 Feb 11, 2011 |
| USB 3.0 RxEqTraining | 0 | 438 |
"USB 3.0 RxEqTraining"
by yyliu04 Feb 11, 2011 |
| USB Error Handling | 2 | 839 |
"RE: USB Error Handling"
by Marcos325 Dec 20, 2010 |
| USB 3.0 Rxelecidle | 0 | 522 |
"USB 3.0 Rxelecidle"
by ibnuhasan Dec 20, 2010 |
| Address decoding in USB 2.0 | 3 | 728 |
"RE: Address decoding in USB 2.0"
by stuge Nov 11, 2010 |
| USB 2.0 phy rx signal | 1 | 1224 |
"RE: USB 2.0 phy rx signal"
by ravivlsiii Nov 1, 2010 |
| USB 1.1 Device Testbench | 0 | 549 |
"USB 1.1 Device Testbench"
by jasonkoberg Oct 25, 2010 |
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