LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Sponsors
  • Mirrors
  • Logos
  • Contact us
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Personal page of Wolfgang Puffitsch

    Usernamejeunes2
    FullnameWolfgang Puffitsch
    Emailhausen@g...
    CityVienna
    CountryAT
    Account created   24-Jan-2007 20:29:15
    Last logged in13-Jun-2008 14:19:06

    Projects

  • McAdam's RISC Computer Architecture
    marca is a simple 16-bit microprocessor, implementing a load/store instruction set architecture and featuring a 4-stage pipeline.
  • JOP: a Java Optimized Processor
    JOP is the implementation of the Java Virtual Machine (JVM) as concrete machine in hardware. The design is full synthesizable and fits in low-cost FPGA devices from Altera and Xilinx.
  •  
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.