OpenCores

16x2 LCD controller :: Overview

Project maintainers

Details

Name: 16x2_lcd_controller
Created: Jul 29, 2012
Updated: Nov 28, 2012
SVN Updated: Nov 28, 2012
SVN: Browse
Latest version: download
Statistics: View

Other project properties

Category: Other
Language: VHDL
Development status: Stable
Additional info: Design done, FPGA proven
WishBone compliant: No
WishBone version: n/a
License: LGPL

Description

Controller for 16 character - 2 line LCD displays as used on various Xilinx evaluation boards.

Features

- 4-bit LCD data interface
- One 128bit-wide std_logic_vector input for each diplay line (16x8bit=128). Everything you send to those inputs goes directly to the display.

Synthesis

- Tested on Xilinx ML501 and ML507
- Virtex5: 37 flip flops, 228 LUTs, >300MHz

© copyright 1999-2017 OpenCores.org, equivalent to ORSoC AB, all rights reserved. OpenCores®, registered trademark.