a VHDL 8254 Timer :: Overview
Other project properties
a VHDL version of the Intel 8254 timer.
Note: uses a synchronous (Wishbone) processor interface, rather than an asynchronous of the Intel 8254.
Design assumes asynchronous interface/counter clocks – includes Boolean generics (for each counter) if the same clock is used for interface and counter, or if the clocks are synchronous (different frequency, but with aligned rising edges)