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PSG16 - ADSR prog. sound gen. :: Overview

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Details

Name: psg16
Created: May 28, 2012
Updated: Jan 7, 2017
SVN Updated: Jan 7, 2017
SVN: Browse
Latest version: download
Statistics: View

Other project properties

Category: Other
Language: Verilog
Development status: Planning
Additional info: none
WishBone compliant: No
WishBone version: n/a
License: LGPL

Description

PSG32 is an audio interface circuit (sound interface device) for use within a programmable system to interface the system to an audio output. It supports four ADSR audio channels with a wavetable option.

Features

PSG32:
- four ADSR / wave table channels
- programmable frequency and pulse width control
- 0.0233 Hz frequency resolution (with 100MHz clock)
- attack, decay, sustain and release
- test, ringmod, sync and gate controls
- five voice types: triangle, square, pulse, noise and wave
- exponential decay and release
Changes from PSG16:
- the register set is 32 bit wide
- decoding of the register address range is externally supplied
- the core no longer uses TDM (time domain multiplexing) during signal generation
- the core no longer has a clock prescaler. Instead the frequency accumulators are wider.
- the core is capable of higher resolution frequencies
- 32 bit frequency synthesis accumulators are used rather than 24 bit.


PSG16:
- four ADSR / wave table channels
- programmable frequency and pulse width control
- 0.06 Hz frequency resolution
- attack, decay, sustain and release
- test, ringmod, sync and gate controls
- five voice types: triangle, square, pulse, noise and wave
- exponential decay and release

PSG Output

PSG Output

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