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Fixed-point quadratic polynomial :: Overview

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Details

Name: quadratic_func
Created: Feb 16, 2009
Updated: Jul 26, 2011
SVN Updated: Mar 10, 2009
SVN: Browse
Latest version: download
Statistics: View

Other project properties

Category: Arithmetic core
Language: VHDL
Development status: Stable
Additional info: FPGA proven
WishBone compliant: No
WishBone version: n/a
License: GPL

Description

Quadratic_func is a fully pipelined quadratic polynomial that computes the relation y = ax^2 + bx + c. On each rising-edge of the clock (when en is high), the coefficients and input x term are sampled at the function inputs. The result has a latency of 3 clock cycles. All inputs to the function are 8-bit signed fractions, with the generic parameter 'fw' specifying the number of fraction bits. The output result is a 24-bit signed fraction. If integer arithmetic is preferred, then the parameter fw should be set to 0. For larger bit-widths, the design can easily be scaled up to suit the application.

Quadratic function plot

The quadratic core is ideal for curve-fitting applications such as estimating SIN/COS or ATAN. It provides a useful alternative to LUT-based estimation or it may be used in conjunction with a small LUT to generate more precise results. As an example, the following plot shows the output result of the function: y = 0.86x^2 - 0.22x + 0.3 in the range [-2, 2]. For a full description of the core, please review the following Quadratic function pdf datasheet.

Quadratic function plot

Features

- Computes the relation y = ax^2 + bx + c
- Signed 8-bit fixed-point input
- Signed 8-bit fixed-point coefficients
- Signed 24-bit fixed-point output
- Configurable number of fraction bits
- Dynamic coefficients updated every clock cycle
- No internal loss of precision (no rounding or truncation)
- Fully pipelined architecture
- Result has a 3 clock-cycle latency

Status

- Fully tested and complete
- Future versions to support generic input data and coefficient widths as well as fraction width

Help and Support

Simon Doherty is a Senior Design Consultant at ZIPcores If you require further assistance regarding the implementation of this core, you may contact me directly via my Opencores email alias at sdoherty@opencores.org. Alternatively you may contact me through customer support at ZIPcores.

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