marsgod

SHA cores

## Description

This is a collection of SHA(Secure Hash Algorithm) cores. These include SHA-1, SHA-2 algorithms.  
These cores are non-pipelined version of SHA, and have simple interfaces with the host side.

## Features

\- Support SHA-1(160), SHA-2(256/384/512)  
\- Use a simple 32-bit I/O bus interface  
\- High performance  
\- Share hardware between different SHA processing  
\- Can operate up to 200MHz at 0.18um Standard cell design  
\- Written in VerilogHDL  

## Status

\- Initial release

## TODO

\- Combine SHA1/SHA2 in a single core  
\- Make it smaller and faster!


<h2 id="description">Description</h2>
<p>  This is a collection of SHA(Secure Hash Algorithm) cores. These include SHA-1, SHA-2 algorithms.<br />
  These cores are non-pipelined version of SHA, and have simple interfaces with the host side. </p>
<h2 id="features">Features</h2>
<p>- Support SHA-1(160), SHA-2(256/384/512)<br />
- Use a simple 32-bit I/O bus interface<br />
- High performance<br />
- Share hardware between different SHA processing<br />
- Can operate up to 200MHz at 0.18um Standard cell design<br />
- Written in VerilogHDL<br />
</p>
<h2 id="status">Status</h2>
<p>- Initial release</p>
<h2 id="todo">TODO</h2>
<p>-  Combine SHA1/SHA2 in a single core<br />
-  Make it smaller and faster!</p>


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SHA cores

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Features

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TODO