OpenCores

SPI Verilog Master & Slave modules :: Downloads

This page contains files uploaded to the old opencores website as well as images and documents intended for use on other pages in this project. If you want to download this project or browse its svn, you can do so at the overview-page.

Description Embedd-tag Preview Date
Simulation Outuput Waveform Show Link 03/13/14 14:49
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