Srdy-Drdy Library :: Overview
Project maintainers
Details
Name: srdydrdy_lib
Created: Dec 22, 2009
Updated: Apr 19, 2011
SVN Updated: Jul 1, 2011
SVN: Browse
Latest version: download
Statistics: View
Other project properties
Category: Library
Language: Verilog
Development status: Alpha
Additional info:
none
WishBone Compliant: No
License: Others
Description
The srdy-drdy library provides a group of components all built around a common data-transfer protocol. This protocol is used in datapath applications and provides bidirectional flow control.
Components in the library provide basic timing closure, clock domain crossing, basic and advanced buffering, and some arbitration and specialized components. The components in the library have been used in multiple successful tape-outs and FPGA designs.