68HC11 System on a Chip designed for a 300K Gate Spartan II, but will fit in a 200K gate device. It does not include the 68HC11 peripherals. The Home page for the project is Here
- 68HC11 compatible CPU core
- Modified SWTBUG Monitor ROM
- MiniUart modified to look like a 6850
- dual 8 bit parallel I/O port
- Compact Flash Interface
- Dynamic Address Translation RAM (1Mbyte addressing)
- New release in CVS for Web Pack ISE 6.2
- Designed for BurchED B5-X300 board
- Runs 6800 instructions
- Bit operators untested
- Fractional and Integer division untested
- Condition codes for division known not to be correct.
- New more reliable UART runs at 57.6 Kbaud.
- 25MHz system Clock
- CPU runs at 12.5 MHz with 15 ns B5-SRAM module.