PDP-11/70 CPU core and SoC :: Installation
Installation
Documentation
An admittedly still rudimentary documentation can be found in the doc directory, specifically on- release notes in README.txt
- installation and building test benches and systems INSTALL.txt
- running test benches in w11a_tb_guide.txt
- booting operating systems in w11a_os_guide.txt
- known differences, limitations and issues w11a_known_issues.txt
Revisions
A full list of tagged versions and minor releases is given in the 'Change Log' part of README.txt and in section Releases. Currently available revisions are2011-09-12 trunk development snapshot (V0.531) 2010-07-23 w11a_V0.5 initial release, w11a + baseline peripherals
Directory Structure
doc Documentation rtl VHDL sources rtl/bplib - board and component support libs rtl/bplib/issi - for ISSI parts rtl/bplib/micron - for Micron parts rtl/bplib/nexys2 - for Digilent Nexsy2 board rtl/bplib/nexys3 - for Digilent Nexsy3 board rtl/bplib/s3board - for Digilent S3BOARD rtl/ibus - ibus devices (UNIBUS peripherals) rtl/sys_gen - top level designs rtl/sys_gen/tst_rlink - top level designs for an rlink tester rtl/sys_gen/w11a - top level designs for w11a SoC rtl/sys_gen/w11a/nexys2 - w11a SoC for Digilent Nexsy2 rtl/sys_gen/w11a/nexys3 - w11a SoC for Digilent Nexsy3 rtl/sys_gen/w11a/s3board - w11a SoC for Digilent S3BOARD rtl/vlib - VHDL component libs rtl/vlib/comlib - communication rtl/vlib/genlib - general rtl/vlib/memlib - memory rtl/vlib/rbus - remote-register-interface - rbus rtl/vlib/rlink - remote-register-interface - rlink rtl/vlib/serport - serial port (UART) rtl/vlib/simlib - simulation helper lib rtl/vlib/xlib - Xilinx specific components rtl/w11a - w11a core tools helper programs tools/bin - scripts and binaries tools/dox - Doxygen documentation configuration tools/make - make includes tools/src - C++ sources tools/src/librlink - basic rlink interface tools/src/librlinktpp - C++ to tcl binding for rlink interface tools/src/librtools - general support classes and methods tools/src/librtcltools - support classes to implement Tcl bindings tools/src/librutiltpp - Tcl support commands implemented in C++ tools/tcl - Tcl scriptsSome conventions used throughout the project:
- test benches are in sub-directories '/tb' under the respective source directory
- synthesizable VHDL code uses the architecture name syn while code only used in simulation uses the architecture name sim
- the svn 'Id:' headers in the sources reflect the revision in the svn repository of the author and not the svn revision number of the file in the OpenCores repository.