OpenCores
Issue List
imdct_package.vhd #5
Open ocghost opened this issue almost 19 years ago
ocghost commented almost 19 years ago

library IEEE; use IEEE.STD_LOGIC_1164.all;

package imdct_package is type type_dct is array (17 downto 0) of std_logic_vector(31 downto 0); end;

package body imdct_package is end;

ocghost commented almost 17 years ago

I am Liu Sixiong ,i want this file: imdct_package.vhd . can you sent it to me.

davedicius commented about 15 years ago

With the code, I created a VHDL module and it worked... there is not problem ... It was probed on Project Navigator Xilinx IseWebPack v11.1

but have another bug or problem...

WARNING:Xst:1610 - "D:/xilinx/mp31/mp31/Huffman/huffman.vhd" line 75: Width mismatch. <isg> has a width of 18432 bits but assigned expression is 576-bit wide.

I do not know how could I Fix this bug. thank you. davs@live.de


Assignee
No one
Labels
Bug