RapidIO IP library

The pseudo_random_number_generator in srio_pcs_struct is incorrect. It does not generate random numbers with the expected randomness of a 7:th degree polynom.

The following code will generate a random number with the expected randomness.

--

entity pseudo_random_number_generator is port( clk : in std_logic; areset_n : in std_logic; enable : in std_logic;

q_o : out std_logic_vector(3 downto 0);
randomBit_o : out std_logic);

end entity;

--

architecture behavioral of pseudo_random_number_generator is signal lfsr : std_logic_vector(7 downto 1); signal q0 : std_logic;

begin

-- Output assignment. q_o <= lfsr(6) & lfsr(4) & lfsr(3) & lfsr(1); randomBit_o <= lfsr(7);

-- P(x) = x^7 + x^6 + 1 -- This is a maximal-length polynomial and repeats itself after 127 ticks. q0 <= lfsr(7) xor lfsr(6);

process(clk, areset_n) begin if areset_n = '0' then lfsr <= "0000001"; elsif rising_edge(clk) then if (enable = '1') then lfsr <= lfsr(6 downto 1) & q0; end if; end if; end process;

end architecture;

entity pseudo_random_number_generator is port( clk : in std_logic; areset_n : in std_logic; enable : in std_logic;

q_o : out std_logic_vector(3 downto 0);
randomBit_o : out std_logic);

end entity;

architecture behavioral of pseudo_random_number_generator is signal lfsr : std_logic_vector(7 downto 1); signal q0 : std_logic;

begin

-- Output assignment. q_o <= lfsr(6) & lfsr(4) & lfsr(3) & lfsr(1); randomBit_o <= lfsr(7);

-- P(x) = x^7 + x^6 + 1 -- This is a maximal-length polynomial and repeats itself after 127 ticks. q0 <= lfsr(7) xor lfsr(6);

process(clk, areset_n) begin if areset_n = '0' then lfsr <= "0000001"; elsif rising_edge(clk) then if (enable = '1') then lfsr <= lfsr(6 downto 1) & q0; end if; end if; end process;

end architecture;

hrmf cannot past code into this window :-(