Viterbi HDL Code Generator
I need viterbi decoder for K=7, cc = 1/2, traceback length = 12. can I get it. Plz explain the different inputs that should be given to run code generator.
Thank you.
Yes, you can generate it. Do you have get the source code?
i downloaded Viterbi HDL Code Generator but i dont no how to use it to generate viterbi decoder for K=7, cc = 1/2, traceback length = 12
Please help me. Thanking you sir.
i downloaded Viterbi HDL Code Generator but i dont no how to use it to generate viterbi decoder for K=7, cc = 1/2, traceback length = 12
Please help me. Thanking you sir.
Firstly, You need provide the poly word for your K=7, cc = 1/2 convolution code. For example for 802.11a, the poly word is 91,121 in decimal number. So you put "91 121" in the polys blank, and others keep the default. Press "Ok" for generation, also click "Help" for more information.
sir, I am not able to run this "morpheus1.3release" i have installed
ActivePerl-5.12.1.1201-MSWin32-x86-292674.msiand
vcsetup2008.exewhat i have to do.
I want decoder for " K=7, cc = 1/2, ploy 91,121 but i want to see for different trace back lengths.
sir I want the vhdl code for viterbi decoder plz help me////
sir i want vhdl/verilog code of viterbi decoder algorithm for decoding convolution codes please help me
Thank you
Here are some examples of viterbi decoder, generated by VHCG, maybe help you.
http://viterbi-gen.sourceforge.net/ look for examples.
Sir,i have a query about the convolution encoder & viterbi decoder,if you can help me then that would be very kind of u.Actually i want to implement the above and need vhdl or verilog code for constraint length=7,r=1/2 ,generator polynomials(171oct and 133oct).I don't have VHCG GUI installed so i have the problem in generating code.So please help me and do reply me as soon as possible.
sir,my contact email id-sweetybini13@gmail.com
hello, i am a cuban student and i need a vhdl for viterbi decoder or convolutional coder (my fpga in spartan 3e nexis 2 xilinx). My mail is rgrivera@uclv.edu.cu. Muchas gracias por la ayuda.
i need viterbi decoder verilog code for K=7 AND rate=3/4 using
precomputation logic
i need viterbi decoder verilog code for K=7 AND rate=3/4 using precomputation logic and my mail id: ajaykumarkuna@gmail.com
i have downloaded the viterbi decoder example code from http://sourceforge.net/projects/viterbi-gen/files/viterbi-decoder/example/.
But, when i tried to synthesize the code i am getting an error saying that "found 3 definitions for "="." How would i reslove this?
i have downloaded the viterbi decoder example code from http://sourceforge.net/projects/viterbi-gen/files/viterbi-decoder/example/.
But, when i tried to synthesize the code i am getting an error saying that "found 3 definitions for "="." How would i reslove this?
Hello sir,
I am M.Tech student doing specialisation in VLSI. I started project on Viterbi Decoder. Can any one share me Viterbi decoder using Hamming distance method and Euclidean method with theoretical information of both methods for 1 bit & 2 bit error.
My Id: harsha.ece001@gmail.com
Thanking you.