URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [or1200/] [sim/] [or1200-dsxinsn.S] - Diff between revs 807 and 858

Rev 807	Rev 858
Line 234...	Line 234...


`/* TODO - track and check the number of TLB misses we should`	`/* TODO - track and check the number of TLB misses we should`
`have incurred */`	`have incurred */`

	`/* Check if IC present and skip enabling otherwise */`
	`l.mfspr r3,r0,SPR_UPR`
	`l.andi r4,r3,SPR_UPR_ICP`
	`l.sfeq r4,r0`
	`l.bf test_ok`
	`l.nop`

`/* Now repeat the tests with caches enabled if they weren't */`	`/* Now repeat the tests with caches enabled if they weren't */`
`l.mfspr r1,r0,SPR_SR`	`l.mfspr r1,r0,SPR_SR`
`l.andi r1,r1,SPR_SR_ICE`	`l.andi r1,r1,SPR_SR_ICE`
`l.sfeq r0,r1 /* Set flag if caches not enabled */`	`l.sfeq r0,r1 /* Set flag if caches not enabled */`
`l.bf restart_with_caches_enabled`	`l.bf restart_with_caches_enabled`