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Subversion Repositories 16x2_lcd_display_driver

[/] [16x2_lcd_display_driver/] [trunk/] [rtl/] [lcd_16x2_8bit.v] - Blame information for rev 2

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Line No. Rev Author Line
1 2 jagadeeshj
/*
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16x2 LCD DRIVER
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DESCRIPTION
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        Driver for 16X2 LCD.
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        Fetch data from the input data port and presents it to the LCD pins with enable latch pulse. cd input pin
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        is used to select whether the data is lcd command data or character data.
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IO DETAILS
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        data    >>      lcd input
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        clk             >>      Clock
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        rst             >>      Reset
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        start   >>      Start process
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        cd              >>      0-LCD Command/1-LCD Char
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        rs              >>      LCD Register select
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        en              >>      LCD Enable
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        done_tick       >>      Process completed clock tick
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AUTHOR:
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        Name:   Jagadeesh J
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        Email:  jagadeeshj@kenosys.in
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        Tel:    +91-8098701730
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COMPANY:
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        KENOSYS EMBEDDED SOLUTIONS, SALEM, TAMILNADU, INDIA
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 This program is free software: you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation, either version 3 of the License, or
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   (at your option) any later version.
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   This program is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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   GNU General Public License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this program.  If not, see <http://www.gnu.org/licenses/>.
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 */
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 module lcd_16x2_8bit (
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        input [7:0]data,
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        input clk, rst, start, cd,
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        output [7:0]lcd_data,
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        output rs, en,
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        output reg done_tick
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);
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localparam [2:0] idle    =       3'b000,
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                                        load    =       3'b001,
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                                        wait1   =       3'b010,
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                                        wait2   =       3'b011,
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                                        done    =       3'b100;
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reg [2:0]state_reg,state_next;
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reg [15:0]count_reg;
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wire [15:0]count_next;
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reg [7:0]lcd_data_reg, lcd_data_next;
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reg rs_reg, rs_next, en_reg, en_next, c_load_reg, c_load_next;
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wire c_1ms, c_h1ms;
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always@(posedge clk, negedge rst)
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begin
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        if(!rst)
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        begin
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                state_reg <= idle;
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                c_load_reg <= 0;
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                en_reg <= 0;
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                rs_reg <= 0;
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                lcd_data_reg <= 0;
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                count_reg <= 0;
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        end
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        else
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        begin
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                state_reg <= state_next;
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                c_load_reg <= c_load_next;
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                en_reg <= en_next;
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                rs_reg <= rs_next;
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                lcd_data_reg <= lcd_data_next;
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                count_reg <= count_next;
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        end
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end
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assign count_next = (c_load_reg)?(count_reg + 1'b1):16'd0;
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assign c_1ms = (count_reg == 16'd50000);
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assign c_h1ms = (count_reg == 16'd25000);
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always@*
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begin
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        state_next = state_reg;
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        rs_next = rs_reg;
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        en_next = en_reg;
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        lcd_data_next = lcd_data_reg;
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        done_tick = 0;
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        c_load_next = c_load_reg;
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        case(state_reg)
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                idle:
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                begin
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                        if(start)
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                                state_next = load;
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                end
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                load:
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                begin
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                        state_next = wait1;
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                        lcd_data_next = data;
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                        rs_next = cd;
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                end
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                wait1:
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                begin
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                        c_load_next = 1;
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                        en_next = 1;
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                        if(c_1ms)
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                        begin
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                                state_next = wait2;
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                                en_next = 0;
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                                c_load_next = 0;
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                        end
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                end
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                wait2:
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                begin
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                        c_load_next= 1;
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                        if(c_h1ms)
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                        begin
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                                state_next = done;
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                                c_load_next = 0;
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                        end
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                end
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                done:
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                begin
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                        done_tick = 1;
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                        state_next = idle;
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                end
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endcase
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end
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assign lcd_data = lcd_data_reg;
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assign en = en_reg;
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assign rs = rs_reg;
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endmodule

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