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[/] [1g_ethernet_dpi/] [tags/] [vmblite_base/] [hw/] [src/] [rtl/] [mblite/] [core/] [core_Pkg.vhd] - Blame information for rev 7

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1 7 kuzmi4
----------------------------------------------------------------------------------------------
2
--
3
--      Input file         : core_Pkg.vhd
4
--      Design name        : core_Pkg
5
--      Author             : Tamar Kranenburg
6
--      Company            : Delft University of Technology
7
--                         : Faculty EEMCS, Department ME&CE
8
--                         : Systems and Circuits group
9
--
10
--      Description        : Package with components and type definitions for the interface
11
--                           of the components
12
--
13
--
14
----------------------------------------------------------------------------------------------
15
 
16
library ieee;
17
use ieee.std_logic_1164.all;
18
use ieee.std_logic_unsigned.all;
19
 
20
library mblite;
21
use mblite.config_Pkg.all;
22
use mblite.std_Pkg.all;
23
 
24
package core_Pkg is
25
 
26
    constant C_8_ZEROS  : std_logic_vector ( 7 downto 0) := (others => '0');
27
    constant C_16_ZEROS : std_logic_vector (15 downto 0) := (others => '0');
28
    constant C_24_ZEROS : std_logic_vector (23 downto 0) := (others => '0');
29
    constant C_32_ZEROS : std_logic_vector (31 downto 0) := (others => '0');
30
----------------------------------------------------------------------------------------------
31
-- TYPES USED IN MB-LITE
32
----------------------------------------------------------------------------------------------
33
 
34
    type alu_operation    is (ALU_ADD, ALU_OR, ALU_AND, ALU_XOR, ALU_SHIFT, ALU_SEXT8, ALU_SEXT16, ALU_MUL, ALU_BS);
35
    type src_type_a       is (ALU_SRC_REGA, ALU_SRC_NOT_REGA, ALU_SRC_PC, ALU_SRC_ZERO);
36
    type src_type_b       is (ALU_SRC_REGB, ALU_SRC_NOT_REGB, ALU_SRC_IMM, ALU_SRC_NOT_IMM);
37
    type carry_type       is (CARRY_ZERO, CARRY_ONE, CARRY_ALU, CARRY_ARITH);
38
    type carry_keep_type  is (CARRY_NOT_KEEP, CARRY_KEEP);
39
    type branch_condition is (NOP, BNC, BEQ, BNE, BLT, BLE, BGT, BGE);
40
    type transfer_size    is (WORD, HALFWORD, BYTE);
41
 
42
    type ctrl_execution is record
43
        alu_op      : alu_operation;
44
        alu_src_a   : src_type_a;
45
        alu_src_b   : src_type_b;
46
        operation   : std_logic;
47
        carry       : carry_type;
48
        carry_keep  : carry_keep_type;
49
        branch_cond : branch_condition;
50
        delay       : std_logic;
51
    end record;
52
 
53
    type ctrl_memory is record
54
        mem_write     : std_logic;
55
        mem_read      : std_logic;
56
        transfer_size : transfer_size;
57
    end record;
58
 
59
    type ctrl_memory_writeback_type is record
60
        mem_read      : std_logic;
61
        transfer_size : transfer_size;
62
    end record;
63
 
64
    type forward_type is record
65
        reg_d     : std_logic_vector(CFG_GPRF_SIZE - 1 downto 0);
66
        reg_write : std_logic;
67
    end record;
68
 
69
    type imem_in_type is record
70
        dat_i : std_logic_vector(CFG_IMEM_WIDTH - 1 downto 0);
71
    end record;
72
 
73
    type imem_out_type is record
74
        adr_o : std_logic_vector(CFG_IMEM_SIZE - 1 downto 0);
75
        ena_o : std_logic;
76
    end record;
77
 
78
    type fetch_in_type is record
79
        hazard        : std_logic;
80
        branch        : std_logic;
81
        branch_target : std_logic_vector(CFG_IMEM_SIZE - 1 downto 0);
82
    end record;
83
 
84
    type fetch_out_type is record
85
        program_counter : std_logic_vector(CFG_IMEM_SIZE - 1 downto 0);
86
    end record;
87
 
88
    type gprf_out_type is record
89
        dat_a_o : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
90
        dat_b_o : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
91
        dat_d_o : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
92
    end record;
93
 
94
    type decode_in_type is record
95
        program_counter : std_logic_vector(CFG_IMEM_SIZE - 1 downto 0);
96
        instruction     : std_logic_vector(CFG_IMEM_WIDTH - 1 downto 0);
97
        ctrl_wrb        : forward_type;
98
        ctrl_mem_wrb    : ctrl_memory_writeback_type;
99
        mem_result      : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
100
        alu_result      : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
101
        interrupt       : std_logic;
102
        flush_id        : std_logic;
103
    end record;
104
 
105
    type decode_out_type is record
106
        reg_a           : std_logic_vector(CFG_GPRF_SIZE - 1 downto 0);
107
        reg_b           : std_logic_vector(CFG_GPRF_SIZE - 1 downto 0);
108
        imm             : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
109
        program_counter : std_logic_vector(CFG_IMEM_SIZE - 1 downto 0);
110
        hazard          : std_logic;
111
        ctrl_ex         : ctrl_execution;
112
        ctrl_mem        : ctrl_memory;
113
        ctrl_wrb        : forward_type;
114
        fwd_dec_result  : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
115
        fwd_dec         : forward_type;
116
    end record;
117
 
118
    type gprf_in_type is record
119
        adr_a_i : std_logic_vector(CFG_GPRF_SIZE - 1 downto 0);
120
        adr_b_i : std_logic_vector(CFG_GPRF_SIZE - 1 downto 0);
121
        adr_d_i : std_logic_vector(CFG_GPRF_SIZE - 1 downto 0);
122
        dat_w_i : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
123
        adr_w_i : std_logic_vector(CFG_GPRF_SIZE - 1 downto 0);
124
        wre_i   : std_logic;
125
    end record;
126
 
127
    type execute_out_type is record
128
        alu_result      : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
129
        dat_d           : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
130
        branch          : std_logic;
131
        program_counter : std_logic_vector(CFG_IMEM_SIZE - 1 downto 0);
132
        flush_id        : std_logic;
133
        ctrl_mem        : ctrl_memory;
134
        ctrl_wrb        : forward_type;
135
    end record;
136
 
137
    type execute_in_type is record
138
        reg_a           : std_logic_vector(CFG_GPRF_SIZE  - 1 downto 0);
139
        dat_a           : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
140
        reg_b           : std_logic_vector(CFG_GPRF_SIZE  - 1 downto 0);
141
        dat_b           : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
142
        dat_d           : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
143
        imm             : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
144
        program_counter : std_logic_vector(CFG_IMEM_SIZE - 1 downto 0);
145
        fwd_dec         : forward_type;
146
        fwd_dec_result  : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
147
        fwd_mem         : forward_type;
148
        ctrl_ex         : ctrl_execution;
149
        ctrl_mem        : ctrl_memory;
150
        ctrl_wrb        : forward_type;
151
        ctrl_mem_wrb    : ctrl_memory_writeback_type;
152
        mem_result      : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
153
        alu_result      : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
154
 
155
    end record;
156
 
157
    type mem_in_type is record
158
        dat_d           : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
159
        alu_result      : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
160
        mem_result      : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
161
        program_counter : std_logic_vector(CFG_IMEM_SIZE - 1 downto 0);
162
        branch          : std_logic;
163
        ctrl_mem        : ctrl_memory;
164
        ctrl_wrb         : forward_type;
165
    end record;
166
 
167
    type mem_out_type is record
168
        alu_result  : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
169
        ctrl_wrb     : forward_type;
170
        ctrl_mem_wrb : ctrl_memory_writeback_type;
171
    end record;
172
 
173
    type dmem_in_type is record
174
        dat_i : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
175
        ena_i : std_logic;
176
    end record;
177
 
178
    type dmem_out_type is record
179
        dat_o : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
180
        adr_o : std_logic_vector(CFG_DMEM_SIZE - 1 downto 0);
181
        sel_o : std_logic_vector(3 downto 0);
182
        we_o  : std_logic;
183
        ena_o : std_logic;
184
    end record;
185
 
186
    type dmem_in_array_type is array(natural range <>) of dmem_in_type;
187
    type dmem_out_array_type is array(natural range <>) of dmem_out_type;
188
 
189
    -- WB-master inputs from the wb-slaves
190
    type wb_mst_in_type is record
191
        clk_i : std_logic;                                     -- master clock input
192
        rst_i : std_logic;                                     -- synchronous active high reset
193
        dat_i : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0); -- databus input
194
        ack_i : std_logic;                                     -- buscycle acknowledge input
195
        int_i : std_logic;                                     -- interrupt request input
196
    end record;
197
 
198
    -- WB-master outputs to the wb-slaves
199
    type wb_mst_out_type is record
200
        adr_o : std_logic_vector(CFG_DMEM_SIZE - 1 downto 0);  -- address bits
201
        dat_o : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0); -- databus output
202
        we_o  : std_logic;                                     -- write enable output
203
        stb_o : std_logic;                                     -- strobe signals
204
        sel_o : std_logic_vector(3 downto 0);                  -- select output array
205
        cyc_o : std_logic;                                     -- valid BUS cycle output
206
    end record;
207
 
208
    -- WB-slave inputs, from the WB-master
209
    type wb_slv_in_type is record
210
        clk_i : std_logic;                                     -- master clock input
211
        rst_i : std_logic;                                     -- synchronous active high reset
212
        adr_i : std_logic_vector(CFG_DMEM_SIZE - 1 downto 0);  -- address bits
213
        dat_i : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0); -- Databus input
214
        we_i  : std_logic;                                     -- Write enable input
215
        stb_i : std_logic;                                     -- strobe signals / core select signal
216
        sel_i : std_logic_vector(3 downto 0);                  -- select output array
217
        cyc_i : std_logic;                                     -- valid BUS cycle input
218
    end record;
219
 
220
    -- WB-slave outputs to the WB-master
221
    type wb_slv_out_type is record
222
        dat_o : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0); -- Databus output
223
        ack_o : std_logic;                                     -- Bus cycle acknowledge output
224
        int_o : std_logic;                                     -- interrupt request output
225
    end record;
226
 
227
----------------------------------------------------------------------------------------------
228
-- COMPONENTS USED IN MB-LITE
229
----------------------------------------------------------------------------------------------
230
 
231
    component core
232
        generic (
233
            G_INTERRUPT  : boolean := CFG_INTERRUPT;
234
            G_USE_HW_MUL : boolean := CFG_USE_HW_MUL;
235
            G_USE_BARREL : boolean := CFG_USE_BARREL;
236
            G_DEBUG      : boolean := CFG_DEBUG
237
        );
238
        port (
239
            imem_o : out imem_out_type;
240
            dmem_o : out dmem_out_type;
241
            imem_i : in imem_in_type;
242
            dmem_i : in dmem_in_type;
243
            int_i  : in std_logic;
244
            rst_i  : in std_logic;
245
            clk_i  : in std_logic
246
        );
247
    end component;
248
 
249
    component core_wb
250
        generic (
251
            G_INTERRUPT  : boolean := CFG_INTERRUPT;
252
            G_USE_HW_MUL : boolean := CFG_USE_HW_MUL;
253
            G_USE_BARREL : boolean := CFG_USE_BARREL;
254
            G_DEBUG      : boolean := CFG_DEBUG
255
        );
256
        port (
257
            imem_o : out imem_out_type;
258
            wb_o   : out wb_mst_out_type;
259
            imem_i : in imem_in_type;
260
            wb_i   : in wb_mst_in_type
261
        );
262
    end component;
263
 
264
    component core_wb_adapter
265
        port (
266
            dmem_i : out dmem_in_type;
267
            wb_o   : out wb_mst_out_type;
268
            dmem_o : in dmem_out_type;
269
            wb_i   : in wb_mst_in_type
270
        );
271
    end component;
272
 
273
    component core_wb_async_adapter
274
        port (
275
            dmem_i : out dmem_in_type;
276
            wb_o   : out wb_mst_out_type;
277
            dmem_o : in dmem_out_type;
278
            wb_i   : in wb_mst_in_type
279
        );
280
    end component;
281
 
282
    component fetch
283
        port (
284
            fetch_o : out fetch_out_type;
285
            imem_o  : out imem_out_type;
286
            fetch_i : in fetch_in_type;
287
            rst_i   : in std_logic;
288
            ena_i   : in std_logic;
289
            clk_i   : in std_logic
290
        );
291
    end component;
292
 
293
    component decode
294
        generic (
295
            G_INTERRUPT  : boolean := CFG_INTERRUPT;
296
            G_USE_HW_MUL : boolean := CFG_USE_HW_MUL;
297
            G_USE_BARREL : boolean := CFG_USE_BARREL;
298
            G_DEBUG      : boolean := CFG_DEBUG
299
        );
300
        port (
301
            decode_o : out decode_out_type;
302
            gprf_o   : out gprf_out_type;
303
            decode_i : in decode_in_type;
304
            ena_i    : in std_logic;
305
            rst_i    : in std_logic;
306
            clk_i    : in std_logic
307
        );
308
    end component;
309
 
310
    component gprf
311
        port (
312
            gprf_o : out gprf_out_type;
313
            gprf_i : in gprf_in_type;
314
            ena_i  : in std_logic;
315
            clk_i  : in std_logic
316
        );
317
    end component;
318
 
319
    component execute
320
        generic (
321
            G_USE_HW_MUL : boolean := CFG_USE_HW_MUL;
322
            G_USE_BARREL : boolean := CFG_USE_BARREL
323
        );
324
        port (
325
            exec_o : out execute_out_type;
326
            exec_i : in execute_in_type;
327
            ena_i  : in std_logic;
328
            rst_i  : in std_logic;
329
            clk_i  : in std_logic
330
        );
331
    end component;
332
 
333
    component mem
334
        port (
335
            mem_o  : out mem_out_type;
336
            dmem_o : out dmem_out_type;
337
            mem_i  : in mem_in_type;
338
            ena_i  : in std_logic;
339
            rst_i  : in std_logic;
340
            clk_i  : in std_logic
341
        );
342
    end component;
343
 
344
    component core_address_decoder
345
        generic (
346
            G_NUM_SLAVES : positive := CFG_NUM_SLAVES
347
        );
348
        port (
349
            m_dmem_i : out dmem_in_type;
350
            s_dmem_o : out dmem_out_array_type;
351
            m_dmem_o : in dmem_out_type;
352
            s_dmem_i : in dmem_in_array_type;
353
            clk_i    : in std_logic
354
        );
355
    end component;
356
----------------------------------------------------------------------------------------------
357
-- FUNCTIONS USED IN MB-LITE
358
----------------------------------------------------------------------------------------------
359
 
360
    function select_register_data (reg_dat, reg, wb_dat : std_logic_vector; write : std_logic) return std_logic_vector;
361
    function forward_condition (reg_write : std_logic; reg_a, reg_d : std_logic_vector) return std_logic;
362
    function align_mem_load (data : std_logic_vector; size : transfer_size; address : std_logic_vector) return std_logic_vector;
363
    function align_mem_store (data : std_logic_vector; size : transfer_size) return std_logic_vector;
364
    function decode_mem_store (address : std_logic_vector(1 downto 0); size : transfer_size) return std_logic_vector;
365
 
366
end core_Pkg;
367
 
368
package body core_Pkg is
369
 
370
    -- This function select the register value:
371
    --      A) zero
372
    --      B) bypass value read from register file
373
    --      C) value from register file
374
    function select_register_data (reg_dat, reg, wb_dat : std_logic_vector; write : std_logic) return std_logic_vector is
375
        variable tmp : std_logic_vector(CFG_DMEM_WIDTH - 1 downto 0);
376
    begin
377
        if CFG_REG_FORCE_ZERO = true and is_zero(reg) = '1' then
378
            tmp := (others => '0');
379
        elsif CFG_REG_FWD_WRB = true and write = '1' then
380
            tmp := wb_dat;
381
        else
382
            tmp := reg_dat;
383
        end if;
384
        return tmp;
385
    end select_register_data;
386
 
387
    -- This function checks if a forwarding condition is met. The condition is met of register A and D match
388
    -- and the signal needs to be written back to the register file.
389
    function forward_condition (reg_write : std_logic; reg_a, reg_d : std_logic_vector ) return std_logic is
390
    begin
391
        return reg_write and compare(reg_a, reg_d);
392
    end forward_condition;
393
 
394
    -- This function aligns the memory load operation (Big endian decoding). 
395
    function align_mem_load (data : std_logic_vector; size : transfer_size; address : std_logic_vector ) return std_logic_vector is
396
    begin
397
        case size is
398
            when byte =>
399
                case address(1 downto 0) is
400
                    when "00"   => return C_24_ZEROS & data(31 downto 24);
401
                    when "01"   => return C_24_ZEROS & data(23 downto 16);
402
                    when "10"   => return C_24_ZEROS & data(15 downto  8);
403
                    when "11"   => return C_24_ZEROS & data( 7 downto  0);
404
                    when others => return C_32_ZEROS;
405
                end case;
406
            when halfword =>
407
                case address(1 downto 0) is
408
                    when "00"   => return C_16_ZEROS & data(31 downto 16);
409
                    when "10"   => return C_16_ZEROS & data(15 downto  0);
410
                    when others => return C_32_ZEROS;
411
                end case;
412
            when others =>
413
                return data;
414
        end case;
415
    end align_mem_load;
416
 
417
    -- This function repeats the operand to all positions in a memory store operation.
418
    function align_mem_store (data : std_logic_vector; size : transfer_size) return std_logic_vector is
419
    begin
420
        case size is
421
            when byte     => return data( 7 downto 0) & data( 7 downto 0) & data(7 downto 0) & data(7 downto 0);
422
            when halfword => return data(15 downto 0) & data(15 downto 0);
423
            when others   => return data;
424
        end case;
425
    end align_mem_store;
426
 
427
    -- This function selects the correct bytes for memory writes (Big endian encoding).
428
    function decode_mem_store (address : std_logic_vector(1 downto 0); size : transfer_size) return std_logic_vector is
429
    begin
430
        case size is
431
            when BYTE =>
432
                case address is
433
                    when "00"   => return "1000";
434
                    when "01"   => return "0100";
435
                    when "10"   => return "0010";
436
                    when "11"   => return "0001";
437
                    when others => return "0000";
438
                end case;
439
            when HALFWORD =>
440
                case address is
441
                    -- Big endian encoding
442
                    when "10"   => return "0011";
443
                    when "00"   => return "1100";
444
                    when others => return "0000";
445
                end case;
446
            when others =>
447
                return "1111";
448
        end case;
449
    end decode_mem_store;
450
 
451
end core_Pkg;

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