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URL https://opencores.org/ocsvn/1g_ethernet_dpi/1g_ethernet_dpi/trunk

Subversion Repositories 1g_ethernet_dpi

[/] [1g_ethernet_dpi/] [trunk/] [hw/] [msim/] [wave.do] - Blame information for rev 4

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Line No. Rev Author Line
1 4 kuzmi4
onerror {resume}
2
quietly WaveActivateNextPane {} 0
3
add wave -noupdate -group dut.SYS_CON /testcase/tb/dut/glbl_rst
4
add wave -noupdate -group dut.SYS_CON /testcase/tb/dut/sys_diff_clock_clk_n
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add wave -noupdate -group dut.SYS_CON /testcase/tb/dut/sys_diff_clock_clk_p
6
add wave -noupdate -group dut.SYS_CON /testcase/tb/dut/u0/Clk
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add wave -noupdate -group dut.SYS_CON /testcase/tb/dut/u0/reset
8
add wave -noupdate -group dut.RGMII /testcase/tb/dut/rgmii_txd
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add wave -noupdate -group dut.RGMII /testcase/tb/dut/rgmii_tx_ctl
10
add wave -noupdate -group dut.RGMII /testcase/tb/dut/rgmii_txc
11
add wave -noupdate -group dut.RGMII /testcase/tb/dut/rgmii_rxd
12
add wave -noupdate -group dut.RGMII /testcase/tb/dut/rgmii_rx_ctl
13
add wave -noupdate -group dut.RGMII /testcase/tb/dut/rgmii_rxc
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add wave -noupdate -group dut.MDIO /testcase/tb/dut/mdio
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add wave -noupdate -group dut.MDIO /testcase/tb/dut/mdc
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add wave -noupdate -divider {New Divider}
17
add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_AWADDR
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_AWPROT
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_AWVALID
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_AWREADY
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_WDATA
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_WSTRB
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_WVALID
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_WREADY
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_BRESP
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_BVALID
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_BREADY
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_ARADDR
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_ARPROT
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_ARVALID
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_ARREADY
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_RDATA
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_RRESP
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_RVALID
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add wave -noupdate -group u0.MB.AXIM.IF /testcase/tb/dut/u0/microblaze_0/M_AXI_DP_RREADY
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_aclk
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_resetn
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_awaddr
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_awvalid
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_awready
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_wdata
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_wvalid
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_wready
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_bresp
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_bvalid
46
add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_bready
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_araddr
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_arvalid
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_arready
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_rdata
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_rresp
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_rvalid
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add wave -noupdate -group u0.TMEMAC.AXIS.IF /testcase/tb/dut/u0/tri_mode_emac_0/s_axi_rready
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add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_mm2s_araddr
55
add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_mm2s_arlen
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add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_mm2s_arsize
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add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_mm2s_arburst
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add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_mm2s_arprot
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add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_mm2s_arcache
60
add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_mm2s_arvalid
61
add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_mm2s_arready
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add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_mm2s_rdata
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add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_mm2s_rresp
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add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_mm2s_rlast
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add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_mm2s_rvalid
66
add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_mm2s_rready
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add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIS-S.IF /testcase/tb/dut/u0/axi_dma_0/m_axis_mm2s_tdata
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add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIS-S.IF /testcase/tb/dut/u0/axi_dma_0/m_axis_mm2s_tkeep
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add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIS-S.IF /testcase/tb/dut/u0/axi_dma_0/m_axis_mm2s_tvalid
70
add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIS-S.IF /testcase/tb/dut/u0/axi_dma_0/m_axis_mm2s_tready
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add wave -noupdate -expand -group u0.AXIDMA -group MM2S.AXIS-S.IF /testcase/tb/dut/u0/axi_dma_0/m_axis_mm2s_tlast
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add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_awaddr
73
add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_awlen
74
add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_awsize
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add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_awburst
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add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_awprot
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add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_awcache
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add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_awvalid
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add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_awready
80
add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_wdata
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add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_wstrb
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add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_wlast
83
add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_wvalid
84
add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_wready
85
add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_bresp
86
add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_bvalid
87
add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIM.IF /testcase/tb/dut/u0/axi_dma_0/m_axi_s2mm_bready
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add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIS-S.IF /testcase/tb/dut/u0/axi_dma_0/s_axis_s2mm_tdata
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add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIS-S.IF /testcase/tb/dut/u0/axi_dma_0/s_axis_s2mm_tkeep
90
add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIS-S.IF /testcase/tb/dut/u0/axi_dma_0/s_axis_s2mm_tvalid
91
add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIS-S.IF /testcase/tb/dut/u0/axi_dma_0/s_axis_s2mm_tready
92
add wave -noupdate -expand -group u0.AXIDMA -group S2MM.AXIS-S.IF /testcase/tb/dut/u0/axi_dma_0/s_axis_s2mm_tlast
93
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_awid
94
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_awaddr
95
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_awlen
96
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_awsize
97
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_awburst
98
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_awlock
99
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_awcache
100
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_awprot
101
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_awvalid
102
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_awready
103
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_wdata
104
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_wstrb
105
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_wlast
106
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_wvalid
107
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_wready
108
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_bid
109
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_bresp
110
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_bvalid
111
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_bready
112
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_arid
113
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_araddr
114
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_arlen
115
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_arsize
116
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_arburst
117
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_arlock
118
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_arcache
119
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_arprot
120
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_arvalid
121
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_arready
122
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_rid
123
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_rdata
124
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_rresp
125
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_rlast
126
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_rvalid
127
add wave -noupdate -group u0.BRAM -group AXIS /testcase/tb/dut/u0/axi_bram_ctrl_0/s_axi_rready
128
add wave -noupdate -group u0.BRAM -group BRAM /testcase/tb/dut/u0/axi_bram_ctrl_0/bram_en_a
129
add wave -noupdate -group u0.BRAM -group BRAM /testcase/tb/dut/u0/axi_bram_ctrl_0/bram_we_a
130
add wave -noupdate -group u0.BRAM -group BRAM /testcase/tb/dut/u0/axi_bram_ctrl_0/bram_addr_a
131
add wave -noupdate -group u0.BRAM -group BRAM /testcase/tb/dut/u0/axi_bram_ctrl_0/bram_wrdata_a
132
add wave -noupdate -group u0.BRAM -group BRAM /testcase/tb/dut/u0/axi_bram_ctrl_0/bram_rddata_a
133
add wave -noupdate -group u0.BRAM -group BRAM /testcase/tb/dut/u0/axi_bram_ctrl_0/bram_en_b
134
add wave -noupdate -group u0.BRAM -group BRAM /testcase/tb/dut/u0/axi_bram_ctrl_0/bram_we_b
135
add wave -noupdate -group u0.BRAM -group BRAM /testcase/tb/dut/u0/axi_bram_ctrl_0/bram_addr_b
136
add wave -noupdate -group u0.BRAM -group BRAM /testcase/tb/dut/u0/axi_bram_ctrl_0/bram_wrdata_b
137
add wave -noupdate -group u0.BRAM -group BRAM /testcase/tb/dut/u0/axi_bram_ctrl_0/bram_rddata_b
138
add wave -noupdate -divider {New Divider}
139
TreeUpdate [SetDefaultTree]
140
WaveRestoreCursors {{Cursor 1} {830667500 ps} 0}
141
quietly wave cursor active 1
142
configure wave -namecolwidth 421
143
configure wave -valuecolwidth 100
144
configure wave -justifyvalue left
145
configure wave -signalnamewidth 0
146
configure wave -snapdistance 10
147
configure wave -datasetprefix 0
148
configure wave -rowmargin 4
149
configure wave -childrowmargin 2
150
configure wave -gridoffset 0
151
configure wave -gridperiod 1
152
configure wave -griddelta 40
153
configure wave -timeline 0
154
configure wave -timelineunits ns
155
update
156
WaveRestoreZoom {0 ps} {1154520675 ps}

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